Chip Design Engineer Jobs in Seattle, WA (NOW HIRING)

Full-time · On-site · San Jose, CA · Austin, TX or Taiwan

Our client seeks an Infrastructure Engineer to design and operate the platform that runs our agentic design-automation systems — both on our own multi-cloud infrastructure and inside our customers' on-prem, private-cloud, and air-gapped environments. This position spans cloud, Kubernetes and containers, enterprise access and security, the compute fabric that runs EDA tools in our on-premises deployment, and the AI/ML and data infrastructure — GPU clusters, data pipelines, and artifact delivery — behind our agents. You'll work on how the platform is built, secured, packaged, and shipped so it runs reliably everywhere our customers do.

The role spans multiple technical areas including:

• Architecting and operating our internal multi-cloud infrastructure across GCP, AWS, and Azure — provisioning, networking, infrastructure, observability, reliability, and cost.

• Designing and delivering on-prem and private-cloud deployments — including air-gapped environments — packaged to drop cleanly into each customer's existing infrastructure.

• Owning the Kubernetes and container foundation: cluster architecture, Helm/packaging, autoscaling, multi-tenancy, and safe lifecycle and upgrades across every cloud and on-prem target.

• Building enterprise access and security end to end — RBAC and ReBAC authorization, SSO/identity integration, secrets management, and audit.

• Building the compute infrastructure that runs EDA tools under the our client's compute fabric — scheduling, isolation, and resource management for licensed EDA workloads that fit and federate into diverse customer environments.

• Standing up and scaling AI/ML infrastructure — GPU clusters and scheduling, distributed training, model serving and inference, and model/environment management.

• Building the data and artifact layer — data pipelines and storage, artifact and model repository management, and the release/“ship” pipeline that packages, signs, and distributes builds and models to cloud, on-prem, and air-gapped customers.

• Deep experience operating production infrastructure on a major cloud (GCP, AWS, or Azure), with working knowledge of more than one.

• Expert-level Kubernetes and container skills (Docker/OCI, Helm) — cluster operations, workload isolation, and multi-tenancy.

• Proven track record delivering software into on-prem, private-cloud, or air-gapped customer environments.

• Strong grasp of authorization and enterprise security — RBAC/ReBAC, identity/SSO, secrets, and audit.

• Proficiency in a systems/automation language (Go, Node, Python, or Rust) and infrastructure-as-code (e.g., Terraform).

• CI/CD and artifact/release management experience — build pipelines, registries, signing, and distribution.

• GPU cluster operations and ML infrastructure (Kubernetes device plugins or Slurm, distributed training, high-throughput inference serving).

• EDA / HPC / licensed-tool compute environments and schedulers (LSF, SGE, Slurm).

• Fine-grained / ReBAC authorization systems (Zanzibar-style, e.g., OpenFGA or SpiceDB).

• Data pipeline / data-platform work (orchestration, lineage) and distributing large model/artifact bundles to air-gapped sites.

• Building portable, packaged deployments — Helm charts, operators, offline install bundles — across heterogeneous customer infrastructure.

• Enterprise security & compliance (SOC 2, supply-chain/SBOM, artifact signing).

You will have the opportunity to:

• Help define a new category of semiconductor design technology.

• Invent the agent-native algorithms and tools that will form the foundation of future automated design workflows.

• Develop GPU-accelerated algorithms that make previously impractical design and optimization workflows possible.

• Build AI systems that perform complex, consequential engineering work—not just generate recommendations.

• Work with real semiconductor workflows, tools, and private engineering knowledge.

• See your research deployed directly with leading chip-design organizations.

• Work in a small, highly technical team where individual contributions can shape the product and company.

• Collaborate with colleagues across San Jose, Austin, and Taiwan.

• Change how chips are designed, rather than focus on only one design or one point tool.

• Our client is an equal opportunity employer. We welcome candidates from diverse backgrounds who are excited to combine ambitious research with meaningful engineering impact.