Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Quick apply
Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Quick apply
Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
$122K - $184K/yr
Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all teams (vertical product model). You own ensuring the quality of the SOC or an IP ...
$122K - $184K/yr
Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all teams (vertical product model). You own ensuring the quality of the SOC or an IP ...
Your work will span from technical deep-dives with chip design teams at Global 500 semiconductor companies to capacity planning sessions with AWS service teams, to keynote presentations at industry ...
Your work will span from technical deep-dives with chip design teams at Global 500 semiconductor companies to capacity planning sessions with AWS service teams, to keynote presentations at industry ...
This role is at the forefront of helping semiconductor companies modernize their chip design and verification workflows by migrating mission-critical EDA workloads to AWS You will work with leading ...
This role is at the forefront of helping semiconductor companies modernize their chip design and verification workflows by migrating mission-critical EDA workloads to AWS You will work with leading ...
This role is at the forefront of helping semiconductor companies modernize their chip design and verification workflows by migrating mission-critical EDA workloads to AWS You will work with leading ...
This role is at the forefront of helping semiconductor companies modernize their chip design and verification workflows by migrating mission-critical EDA workloads to AWS You will work with leading ...
$142K - $263K/yr
Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all subject areas (vertical product model). You own ensuring the quality of the SOC ...
$142K - $263K/yr
Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all subject areas (vertical product model). You own ensuring the quality of the SOC ...
$175K - $308K/yr
Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all fields (vertical product model). You own ensuring the quality of the SOC or an ...
$175K - $308K/yr
Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all fields (vertical product model). You own ensuring the quality of the SOC or an ...
Seattle, WA · On-site
$175 - $308.50/hr
Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all fields (vertical product model). You own ensuring the quality of the SOC or an ...
Seattle, WA · On-site
$175 - $308.50/hr
Description As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all fields (vertical product model). You own ensuring the quality of the SOC or an ...
Redmond, WA · On-site
$40/hr
Must be enrolled in a bachelor's degree or graduate program * 3+ months of software development, hardware engineering, or chip design/development experience * Applicant for this intern position must ...
Redmond, WA · On-site
$40/hr
Must be enrolled in a bachelor's degree or graduate program * 3+ months of software development, hardware engineering, or chip design/development experience * Applicant for this intern position must ...
Redmond, WA · On-site
$40/hr
Must be enrolled in a bachelor's degree or graduate program * 3+ months of software development, hardware engineering, or chip design/development experience * Applicant for this intern position must ...
Redmond, WA · On-site
$40/hr
Must be enrolled in a bachelor's degree or graduate program * 3+ months of software development, hardware engineering, or chip design/development experience * Applicant for this intern position must ...
Seattle, WA · On-site
$190K - $280K/yr
Support chip bring-up and debug through close collaboration with post-silicon and test teams ... Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical ...
Seattle, WA · On-site
$190K - $280K/yr
Support chip bring-up and debug through close collaboration with post-silicon and test teams ... Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical ...
Seattle, WA · On-site
$230K - $322K/yr
Supervise chip-level front-end integration and optimization throughout the development lifecycle and ensure successful production * Work with third-party design partners Minimum Qualifications:
Seattle, WA · On-site
$230K - $322K/yr
Supervise chip-level front-end integration and optimization throughout the development lifecycle and ensure successful production * Work with third-party design partners Minimum Qualifications:
Seattle, WA · On-site
$230K - $322K/yr
Supervise chip-level front-end integration and optimization throughout the development lifecycle and ensure successful production * Work with third-party design partners Minimum Qualifications:
Seattle, WA · On-site
$230K - $322K/yr
Supervise chip-level front-end integration and optimization throughout the development lifecycle and ensure successful production * Work with third-party design partners Minimum Qualifications:
$190K - $280K/yr
Support chip bring-up and debug through close collaboration with post-silicon and test teams ... Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical ...
Quick apply
$190K - $280K/yr
Support chip bring-up and debug through close collaboration with post-silicon and test teams ... Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical ...
Seattle, WA · On-site
$190K - $280K/yr
Support chip bring-up and debug through close collaboration with post-silicon and test teams ... Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical ...
Seattle, WA · On-site
$190K - $280K/yr
Support chip bring-up and debug through close collaboration with post-silicon and test teams ... Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical ...
The Layout Design Engineering group is an integral part of the Silicon Engineering department ... Expert in full-chip/SOC-level floorplanning and integration -- physical implementation of cells and ...
Quick apply
The Layout Design Engineering group is an integral part of the Silicon Engineering department ... Expert in full-chip/SOC-level floorplanning and integration -- physical implementation of cells and ...
Seattle, WA · On-site
$118K - $163K/yr
As part of Nvidia's applied AI team for chip design, you will have the opportunity to tap into the unlimited potential of AI and change the landscape of the chip industry. Our team operates at the ...
Seattle, WA · On-site
$118K - $163K/yr
As part of Nvidia's applied AI team for chip design, you will have the opportunity to tap into the unlimited potential of AI and change the landscape of the chip industry. Our team operates at the ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
$170K - $250K/yr
Experience with chip-package co-design or advanced packaging (2.5D/3D). * Familiarity with physical ... design service vendor management or offshore collaboration. * Experience with sign-off through TSMC.
$170K - $250K/yr
Experience with chip-package co-design or advanced packaging (2.5D/3D). * Familiarity with physical ... design service vendor management or offshore collaboration. * Experience with sign-off through TSMC.
$47.8K - $64.3K
4% of jobs
$64.3K - $80.8K
8% of jobs
$93K is the 25th percentile. Wages below this are outliers.
$80.8K - $97.4K
17% of jobs
The median wage is $112.7K / yr.
$97.4K - $113.9K
22% of jobs
$113.9K - $130.4K
15% of jobs
$130.4K - $146.9K
6% of jobs
$152.2K is the 75th percentile. Wages above this are outliers.
$146.9K - $163.4K
7% of jobs
$163.4K - $179.9K
7% of jobs
$179.9K - $196.4K
8% of jobs
$196.4K - $212.9K
2% of jobs
$212.9K - $229.4K
2% of jobs
$47.8K
$130.4K
$229.4K
A Chip Design job involves creating and developing semiconductor circuits used in electronic devices. Engineers in this field work on designing, verifying, and testing integrated circuits (ICs) to ensure performance, power efficiency, and reliability. They use specialized software tools for designing hardware and optimizing functionality. Chip designers collaborate with cross-functional teams to bring new processors, memory chips, or custom ASICs from concept to production. This role is crucial in industries like computing, telecommunications, and consumer electronics.
To excel in Chip Design, a strong background in electrical engineering, digital and analog circuit design, and semiconductor physics is typically required, often supported by a relevant engineering degree. Familiarity with electronic design automation (EDA) tools like Cadence, Synopsys, and Mentor Graphics, as well as proficiency in hardware description languages (HDLs) such as Verilog or VHDL, are standard prerequisites. Outstanding problem-solving skills, attention to detail, and the ability to collaborate closely with cross-functional teams set candidates apart. These competencies are essential for designing efficient, reliable integrated circuits and meeting the evolving needs of the semiconductor industry.
Chip Design offers a clear pathway for career growth, starting from entry-level positions such as Design Engineer or Verification Engineer and progressing to roles like Lead Designer, Project Manager, or Technical Architect. As you gain experience and demonstrate expertise, opportunities often open up in specialized areas such as physical design, timing analysis, or system architecture. Many professionals also advance to leadership or managerial positions, overseeing teams or entire design projects. Additionally, working in such a fast-evolving field keeps you engaged with the latest technologies and can provide options to transition into adjacent areas like product management or application engineering.
The most popular types of Chip Design jobs in Seattle, WA are:
For Chip Design jobs in Seattle, WA, the most frequently searched job titles are:
The top searched job categories for Chip Design jobs in Seattle, WA are:

Full-time
Posted 20 days ago
Full-time · On-site · San Jose, CA · Austin, TX or Taiwan
About Agentrys
Agentrys is building the next generation of design automation for the semiconductor industry.
Our mission is to enable every engineering organization to build its own self-improving agentic design workforce. Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows.
Our team brings deep experience in artificial intelligence, electronic design automation, semiconductor design, GPU-accelerated computing, and production software systems. We work closely with leading semiconductor companies to turn advanced research into technology that improves engineering productivity, design quality, and time to market.
The Role
We are looking for an exceptional Research Engineer to develop new technologies at the intersection of artificial intelligence, agentic systems, GPU-accelerated computing, and Electronic Design Automation.
You will identify important research problems, develop novel algorithms and agent-native tools, build working prototypes, and help deploy them in real semiconductor design environments. Your work may span AI agents, large language models, reinforcement learning, optimization, GPU-accelerated algorithms, verification, analog design, and other areas of chip design automation.
This role is ideal for someone who combines strong research ability with exceptional implementation skills and wants to see their ideas used in production—not remain only in papers or prototypes.
What You'll Do
Develop new AI and agentic methods for semiconductor design and verification.
Build novel agent-native tools and algorithms designed specifically for autonomous engineering workflows, rather than adapting interfaces built primarily for human users.
Develop GPU-accelerated algorithms for computationally intensive design, analysis, search, simulation, and optimization problems.
Create tools that expose design state, constraints, actions, feedback, and optimization objectives in forms that agents can reason over and use effectively.
Build agents that can understand engineering objectives, use EDA tools, execute multi-step workflows, analyze results, recover from failures, and improve over time.
Research and implement techniques involving large language models, reinforcement learning, parallel algorithms, search, optimization, program synthesis, and machine learning for engineering systems.
Develop solutions for workflows such as functional verification, analog and custom design, RTL development, synthesis, timing analysis, and physical design.
Design rigorous evaluation methods for engineering agents, including problems where design data is private, sparse, or customer-specific.
Translate promising research ideas into reliable, scalable product capabilities.
Integrate AI systems with simulators, formal tools, design databases, commercial EDA tools, GPU computing platforms, and customer engineering infrastructure.
Work directly with semiconductor engineers to understand complex workflows and identify high-impact automation opportunities.
Collaborate with research, product, platform, and solutions teams across San Jose, Austin, and Taiwan.
Contribute to patents, publications, technical presentations, and the broader development of Agentic Design Automation.
What We're Looking For
PhD or master's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
Strong programming skills in Python and proficiency in at least one systems language such as C++ or Rust.
Experience with machine learning frameworks such as PyTorch or JAX.
Demonstrated research or engineering experience in one or more of the following:
Electronic Design Automation
Semiconductor design or verification
Agentic AI or large language models
GPU-accelerated or parallel algorithms
Reinforcement learning
Combinatorial optimization
Program synthesis or code generation
Formal methods
Machine learning for engineering or scientific applications
Ability to take an ambiguous technical problem from initial formulation through experimentation, implementation, and evaluation.
Strong analytical, software engineering, optimization, and debugging skills.
High ownership, intellectual curiosity, and willingness to work across research and product boundaries.
Clear written and verbal communication skills.
Particularly Valuable Experience
Publications in leading EDA, AI, machine learning, systems, high-performance computing, or computer architecture venues.
Experience developing new EDA algorithms, optimization engines, design representations, or domain-specific tools.
Experience developing GPU-accelerated algorithms using CUDA, Triton, or related parallel-computing technologies.
Experience profiling and optimizing computational workloads across CPUs and GPUs.
Experience designing tools or environments for use by autonomous agents.
Experience with simulation, verification, synthesis, timing analysis, physical design, analog design, or layout.
Experience building agents that interact with tools, codebases, databases, or external environments.
Experience with LLM training, post-training, fine-tuning, retrieval, tool use, or evaluation.
Familiarity with Verilog, SystemVerilog, assertions, SPICE, TCL, or semiconductor design flows.
Experience with commercial EDA tools or production chip-design environments.
Experience deploying AI systems in enterprise or security-sensitive environments.
A strong record of implementation through research systems, open-source projects, production software, or technical competitions.
Why Agentrys
At Agentrys, you will have the opportunity to:
Help define a new category of semiconductor design technology.
Invent the agent-native algorithms and tools that will form the foundation of future automated design workflows.
Develop GPU-accelerated algorithms that make previously impractical design and optimization workflows possible.
Build AI systems that perform complex, consequential engineering work—not just generate recommendations.
Work with real semiconductor workflows, tools, and private engineering knowledge.
See your research deployed directly with leading chip-design organizations.
Work in a small, highly technical team where individual contributions can shape the product and company.
Collaborate with colleagues across San Jose, Austin, and Taiwan.
Change how chips are designed, rather than focus on only one design or one point tool.
Sourced by ZipRecruiter
Recruiting and staffing services
51 - 200 Employees
Bellevue, WA, US
2014