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Design Verification Jobs in California (NOW HIRING)

Microsoft

Director, Design Verification

Mountain View, CA · On-site

$160K - $195K/yr

We are looking for a Director, Design Verification join the team. Responsibilities * Build, hire, and mentor a team of talented engineers, supporting their career growth and professional development.

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA

$114K/yr

As a Design Verification Engineer, you will be part of a team working with experienced engineers across the industry, focused on developing advanced ASIC solutions for Meta's data center applications.

Lightmatter

Sr Staff Design Verification

Mountain View, CA

$160K - $195K/yr

As a Design Verification Engineer at Lightmatter, you will find yourself at the heart of a dynamic, interdisciplinary team. Your role will involve close collaboration with our digital design experts ...

Broadcom

Design Verification Engineer

San Jose, CA

$143K - $230K/yr

Strong experience in ASIC design verification flows and DV methodologies * Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.

Voltai

Design Verification Engineer

Palo Alto, CA · On-site

$150 - $210/hr

About this Role We are building next- generation tools for silicon design by combining deep verification expertise with modern AI systems. As a Senior Verification Engineer, your role isn't just ...

Apple

Design Verification Engineer

Cupertino, CA · On-site

$167K - $204K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love ...

Apple

Design Verification Engineer

Cupertino, CA · On-site

$167K - $204K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization ...

7Rays Semiconductors

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

We are seeking a highly motivated Design Verification Engineer to join our Interface IP DV team . In this role, you will collaborate closely with architects, designers, and external vendors to ensure ...

Apple

GPU Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

The GPU Design Verification Engineer will be responsible for the pre-silicon RTL verification of sub-units in the Apple GPU. This includes deep understanding of the micro-architectural details of ...

Voltai

Design Verification Engineer

Palo Alto, CA · On-site

$159K - $195K/yr

About this Role We are building next- generation tools for silicon design by combining deep verification expertise with modern AI systems. As a Senior Verification Engineer, your role isn't just ...

Apple

Design Verification Engineer

Los Angeles, CA

$122K - $214K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Apple

Design Verification Engineer

Los Angeles, CA

$122K - $214K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Apple

Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Apple

Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA · On-site +1

$178K/yr

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

Broadcom, Inc.

Design Verification Engineer

San Jose, CA · On-site

$143K - $230K/yr

Strong experience in ASIC design verification flows and DV methodologies * Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.

Broadcom

Design Verification Engineer

San Jose, CA · On-site

$143K - $230K/yr

Strong experience in ASIC design verification flows and DV methodologies * Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.

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All JobsDesign Verification JobsDesign Verification Jobs in California

Design Verification information

See California salary details

$104.1K

$147.2K

$164.8K

How much do design verification jobs pay per year?

As of Aug 8, 2026, the average yearly pay for design verification in California is $147,197.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,200.00 and $163,800.00 per year, depending on experience, location, and employer.

What is the difference between Design Verification vs Design Validation?

AspectDesign VerificationDesign Validation
PurposeEnsures the design meets specified requirements through testing and analysisConfirms the final product fulfills user needs and intended use
TimingDuring the development phaseAfter the product is developed and before release
MethodsInspections, reviews, testing, analysisUser testing, field trials, real-world testing
FocusDesign correctness and complianceProduct effectiveness and user satisfaction

While Design Verification checks if the design meets specified requirements during development, Design Validation ensures the final product performs effectively in real-world conditions. Both are essential steps in the product development process to deliver a reliable and user-centered product.

What is a design verification engineer?

Design verification engineers are professionals who ensure that hardware or software designs meet their intended specifications and function correctly before production or release. They develop and execute tests, write verification plans, create simulation environments, and identify design flaws or errors. Their work is critical in industries like semiconductor, electronics, and software development to prevent costly mistakes and ensure high-quality products. Design verification engineers often work closely with design and validation teams throughout the product development lifecycle.

What are the key skills and qualifications needed to thrive as a design verification engineer?

To thrive as a Design Verification Engineer, you need a solid background in digital design, verification methodologies, and programming languages like SystemVerilog, typically supported by a degree in electrical engineering or a related field. Familiarity with verification tools such as UVM, simulation environments, and EDA software is essential, along with knowledge of scripting languages like Python or Perl. Strong analytical thinking, attention to detail, and effective teamwork are standout soft skills in this role. These skills ensure accurate validation of complex hardware designs, reducing errors and supporting reliable product development cycles.

What are some common challenges faced by design verification engineers, and how can they be addressed?

Design Verification engineers often encounter challenges such as managing complex testbenches, debugging intricate corner cases, and ensuring coverage completeness within tight project timelines. To address these, it’s important to have strong scripting skills, collaborate closely with design and validation teams, and make effective use of verification methodologies like UVM. Regular communication and review cycles also help catch issues early and improve overall verification quality.
What are the most commonly searched types of Design Verification jobs in California? The most popular types of Design Verification jobs in California are:
What are popular job titles related to Design Verification jobs in California? For Design Verification jobs in California, the most frequently searched job titles are:
What job categories do people searching Design Verification jobs in California look for? The top searched job categories for Design Verification jobs in California are:
What cities in California are hiring for Design Verification jobs? Cities in California with the most Design Verification job openings:
Design Verification jobs near you
Infographic showing various Design Verification job openings in California as of August 2026, with employment types broken down into 77% Full Time, 2% Part Time, and 21% Contract. Highlights an 95% In-person, and 5% Hybrid job distribution, with an average salary of $147,197 per year, or $70.8 per hour.

Director, Design Verification

Microsoft

Mountain View, CA • On-site

$160K - $195K/yr

Full-time

Posted 10 days ago

Microsoft rating

8.5

Company rating: 8.5 out of 10

Based on 132 frontline employees who took The Breakroom Quiz

78th of 242 rated software companies

Job description

Overview
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Artificial Intelligence System on Chip (AISoC) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Director, Design Verification join the team.
Responsibilities
  • Build, hire, and mentor a team of talented engineers, supporting their career growth and professional development.
  • Lead a pre-silicon verification team for the development of custom IP and Subsystem (SS) components with focus on architectural and micro-architectural based functions and features.
  • Interact with architects and design engineers to create testplans covering verification strategy, test requirements, and test environments for IP- or SS-level verification.
  • Write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness.
  • Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments.
  • Collaborate across verification teams on vertical and horizontal reuse of components.
  • Define and implement functional coverage and drive coverage closure.
  • Triage and debug testbench, simulation, and emulation fails.
  • Write makefiles and scripts for verification infrastructure.
  • Apply Agile development methodologies including code reviews, sprint planning, and feature deployment.
  • Provide technical leadership through mentorship and strong teamwork.

Qualifications
Required/minimum qualifications
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR Equivalent Experience.

Other Requirements:
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.
  • This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Additional or Preferred Qualifications
  • 9+ years of experience in design verification with a proven track record of delivering high performance IP, SS or SOC testbenches.
  • 3+ years people management experience.
  • Experience with verification for multiple product cycles from definition to Silicon, including writing test plans, developing tests, debugging failures and coverage signoff in C++ and Universal Verification Methodology (UVM)
  • Experience debugging Register Transfer Level (RTL) designs as well as simulation and/or emulation environments.
  • 12+ years of experience in design verification
  • 5+ years experience managing cross-functional / cross-time-zone engineering teams.
  • Verification lead experience for an IP or SS related to DDR or HBM memory technologies, PCIe, Network Connectivity.
  • Experience of working on Artificial Intelligence (AI) / Machine Learning (ML) SoCs
  • Experience in Scripting language such as Python or Perl
  • Hands on experience in Formal property verification

Silicon Engineering M5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

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About Microsoft

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Our infrastructure is comprised of a large global portfolio of more than 100 datacenters and 1 million servers. Our foundation is built upon and managed by a team of subject matter experts working to support services for more than 1 billion customers and 20 million businesses in over 90 countries worldwide. With environmental sustainability and optimization at the forefront of our datacenter design and operations, we continue to grow and evolve as we meet the ever-changing business demands that hold Microsoft as a world-class cloud provider.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Redmond, WA, US

Year founded

1975

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