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Senior Design Verification Engineer Jobs in California

GTSS Inc

Sr. Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

Senior Design Verification Engineer Location: San Jose, CA (Onsite) Experience: 7+ Years What candidate will Be Doing: * Strong expertise along with complex SoC/IP debug is a must * At-least 5+ years ...

Micron

Senior Design Verification Engineer

San Jose, CA · On-site

$168K - $336K/yr

As a senior Design Verification engineer, you will employ GenAI and agentic tools to build a design verification environment with an innovative workflow that improves verification efficiency and ...

Sivaltech

Senior Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Duration: Full time or Contract Location: Bay Area, CA About Us: We are representing Sivaltech, A design services company headquartered in Milpitas, CA. We provide ...

Actalent

Design Verification Engineer

Santa Clara, CA

$200K - $400K/yr

Description Senior Design Verification Engineer Job Summary We are seeking a Senior Design Verification Engineer to help verify and deliver next-generation AI SoC platforms. In this role, you will ...

Actalent

Design Verification Engineer

Santa Clara, CA

$200K - $400K/yr

Sr. Design Verification Engineer We are seeking a Sr. Design Verification Engineer to help verify and deliver next-generation AI SoC platforms. In this role, you will work closely with architects ...

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All JobsDesign Verification Engineer JobsSenior Design Verification Engineer JobsSenior Design Verification Engineer Jobs in California

Senior Design Verification Engineer information

See California salary details

$62.2K

$119.9K

$189K

How much do senior design verification engineer jobs pay per year?

As of Jul 26, 2026, the average yearly pay for senior design verification engineer in California is $119,875.00, according to ZipRecruiter salary data. Most workers in this role earn between $93,800.00 and $136,700.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Senior Design Verification Engineer, and why are they important?

A Senior Design Verification Engineer requires deep expertise in digital design principles, verification methodologies (such as UVM or OVM), and a degree in electrical or computer engineering. Familiarity with hardware description languages (like Verilog or VHDL), simulation tools (e.g., Synopsys VCS, Cadence Incisive), and scripting languages (such as Python or TCL) is typically expected. Exceptional problem-solving, attention to detail, and strong communication skills help in collaborating with cross-functional teams and navigating complex verification challenges. These skills and qualifications are vital to ensure robust, high-quality hardware designs that meet performance and reliability standards.

What is the difference between Senior Design Verification Engineer vs Design Verification Engineer?

AspectSenior Design Verification EngineerDesign Verification Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field; experience in verification tools and methodologiesBachelor's degree in Electrical Engineering, Computer Engineering, or related field; entry-level experience in verification
Work EnvironmentDesign teams, hardware/software verification labs, collaborative projectsVerification teams, testing labs, development environments
Employer & Industry UsageSemiconductor, electronics, hardware development companiesSimilar industries, often as entry or mid-level roles within verification teams

The main difference is experience level and responsibility. Senior Design Verification Engineers typically lead verification efforts, mentor junior staff, and handle complex verification tasks, while Design Verification Engineers focus on executing verification plans and testing designs under supervision. Both roles require similar technical skills and industry knowledge, but the senior role involves more leadership and strategic planning.

What are Senior Design Verification Engineers?

Senior Design Verification Engineers are experienced professionals responsible for ensuring that hardware designs, such as integrated circuits or system-on-chip (SoC) components, meet all functional specifications and quality standards before manufacturing. They create and execute verification plans, develop testbenches, and use simulation tools to identify and resolve design issues. Their expertise helps prevent costly errors, ensuring reliable and functional products. Typically, they collaborate closely with design, validation, and product engineering teams and often mentor junior engineers.

What are some typical challenges faced by Senior Design Verification Engineers when working on complex chip designs?

Senior Design Verification Engineers often encounter challenges such as managing verification of increasingly complex and large-scale integrated circuits, ensuring comprehensive coverage, and identifying hard-to-find corner-case bugs. They frequently collaborate across cross-functional teams, including design, firmware, and test engineering, to clarify specifications and resolve issues. Effective communication and a proactive approach to debugging and process improvement are critical, as is keeping up with evolving verification methodologies and tools to ensure high-quality, on-time project delivery.
What are the most commonly searched types of Design Verification Engineer jobs in California? The most popular types of Design Verification Engineer jobs in California are:
What are popular job titles related to Senior Design Verification Engineer jobs in California? For Senior Design Verification Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Senior Design Verification Engineer jobs in California look for? The top searched job categories for Senior Design Verification Engineer jobs in California are:
What cities in California are hiring for Senior Design Verification Engineer jobs? Cities in California with the most Senior Design Verification Engineer job openings:
Senior Design Verification Engineer jobs near you
Infographic showing various Senior Design Verification Engineer job openings in California as of July 2026, with employment types broken down into 87% Full Time, 10% Part Time, and 3% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $119,875 per year, or $57.6 per hour.

Senior Design Verification Engineer

Hewlett Packard Enterprise Development LP

Sunnyvale, CA • On-site

$159K - $194K/yr

Full-time

Posted 6 days ago

Job description

Senior Design Verification Engineer
This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.
Who We Are:
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world. Our culture thrives on finding new and better ways to accelerate what's next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
Job Description:
We are seeking a motivated and detail-oriented Senior Design Verification Engineer to join our team. This is an entry-level position ideal for recent graduates who are passionate about hardware design verification and eager to build a career in the semiconductor or systems engineering industry.
As a Design Verification Engineer, you will work alongside experienced engineers to verify the correctness and functionality of digital designs. You will develop testbenches, write test plans, debug failures, and contribute to improving our verification methodologies. This is an excellent opportunity to apply your academic foundation to real-world challenges in a collaborative, fast-paced environment.
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science from an accredited institution.

  • Coursework or academic projects in one or more of the following:

  • Digital logic design and computer architecture.

  • Hardware Description Languages (HDL) such as Verilog or VHDL.

  • Basic understanding of verification concepts (simulation, assertions, code coverage).

  • Familiarity with at least one programming or scripting language (e.g., Python, C, C++, or SystemVerilog).

  • Strong analytical and problem-solving skills.

  • Effective written and verbal communication skills.

  • Ability to work collaboratively in a team environment.

Preferred Qualifications
  • Master's degree in Electrical Engineering, Computer Engineering, or a related field.

  • Academic or class projects involving networking protocols (e.g., Ethernet, TCP/IP, USB, PCIe) or communication protocols (e.g., UART, SPI, I2C, AXI, AMBA).

  • Hands-on experience with SystemVerilog and UVM (Universal Verification Methodology) through coursework or personal projects.

  • Exposure to constrained-random verification, functional coverage, and assertion-based verification techniques.

  • Experience with EDA tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa.

  • Familiarity with scripting for automation (e.g., Python, Tcl, Perl, Shell).

  • Coursework or project experience in any of the following areas:

  • FPGA prototyping and implementation.

  • SoC (System-on-Chip) design and integration.

  • Signal processing or embedded systems.

  • Contributions to open-source hardware projects or participation in relevant competitions (e.g., IEEE, ACM).

  • Coursework or project experience involving AI/ML applications such as Gen AI, using AIML chatbot as a programming aid, etc.

  • Internship or co-op experience in a design verification or related role.

What We Can Offer You:
Health & Wellbeing
We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.
Personal & Professional Development
We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.
Unconditional Inclusion
We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.
Let's Stay Connected:
Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.
#unitedstates
Job:
Engineering
Job Level:
TCP_04
"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
- United States of America: Annual Salary USD 153,500 - 310,500 in California
The listed salary range reflects base salary. Variable incentives may also be offered."
Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html
HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.
Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.
HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.
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We have become aware of an increase in fraudulent recruitment activities in which individuals impersonate our company or authorized recruitment agencies to offer fake employment opportunities. These scams may occur through false websites, emails, social media, or chat-based applications and often aim to obtain personal information or money. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We also never request personal information such as back account details, Social Security numbers, or national IDs via social media or chat applications.
All legitimate job opportunities will come through official company channels, and candidates are responsible for verifying the credentials of any third party claiming to represent the company. Any reliance on fraudulent communication is at the individual's own risk, and HPE disclaims legal liability for any resulting damages. If you suspect recruitment fraud, do not share personal information or make any payments and report the incident to your local authorities immediately.

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