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Remote Design Verification Engineer Jobs in California

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA · On-site +1

$146K/yr

As a Design Verification Engineer, you will be part of an agile team working with experienced engineers across the industry, focused on developing ASIC solutions for Meta's data center applications.

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA · On-site +1

$178K/yr

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

Broadcom

ASIC Verification Engineer

Irvine, CA · On-site +1

ASIC Verification EngineerHigh Speed Interconnect Product (HSIP) Group TheOpportunity Broadcom is ... We design the industry's lowest-power, highest-performance PHYs that enable the world's fastest ...

Infotech Sourcing

Design Engineer V

Sunnyvale, CA · On-site +1

US - Remote Job Title: Core Engineering - Design Engineer V PCB Layout Engineer, AR Product Team As ... verification using Meta's Design Traveler document. Create and modify engineering tool project ...

Tenstorrent

$100K - $500K/yr

This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon ...

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Remote Design Verification Engineer information

What is a remote design verification engineer?

Remote Design Verification Engineers are professionals who work from a remote location to ensure that hardware designs, such as integrated circuits or systems on a chip (SoC), function correctly according to their specifications. They use simulation and verification tools to test digital designs, identify bugs, and work closely with design teams to resolve issues. Their responsibilities often include writing test benches, developing verification plans, and automating tests to improve efficiency. This role requires a strong background in hardware description languages like Verilog or VHDL, as well as experience with verification methodologies such as UVM or SystemVerilog.

What are the key skills and qualifications needed to thrive as a remote design verification engineer?

To thrive as a Remote Design Verification Engineer, you need a solid background in digital design, verification methodologies (such as UVM or SystemVerilog), and a relevant engineering degree. Proficiency in simulation tools (like VCS or ModelSim), scripting languages (Python or Perl), and version control systems is typically required. Exceptional problem-solving abilities, attention to detail, and strong communication skills are crucial for effective collaboration in a remote environment. These competencies ensure accurate verification, efficient workflow, and high-quality deliverables in complex hardware development projects.

What are some common challenges faced by remote design verification engineers, and how can they be addressed?

Remote Design Verification Engineers often encounter challenges related to communication and collaboration, especially when working with global teams across different time zones. Maintaining clear and frequent communication through project management tools and regular video meetings is essential. Additionally, ensuring access to secure and reliable simulation environments can be a hurdle, so familiarity with remote access protocols and cloud-based verification tools is beneficial. Proactively documenting verification processes and results also helps keep everyone aligned and facilitates smoother project progress.

What is the difference between Remote Design Verification Engineer vs Remote Test Engineer?

AspectRemote Design Verification EngineerRemote Test Engineer
CredentialsBachelor's in Electrical Engineering, Computer Engineering, or related field; knowledge of verification toolsBachelor's in Electrical Engineering, Computer Engineering, or related field; testing certifications beneficial
Work EnvironmentDesign labs, simulation environments, collaboration with design teamsTesting labs, field testing, collaboration with verification teams
Industry UsageSemiconductors, integrated circuits, hardware design companiesElectronics, hardware manufacturing, embedded systems companies

The Remote Design Verification Engineer focuses on verifying hardware designs through simulation and analysis before manufacturing, ensuring design correctness. In contrast, the Remote Test Engineer primarily tests finished products or prototypes to validate functionality and performance. Both roles require technical expertise and collaboration but differ in their project stages and focus areas.

What are the most commonly searched types of Design Verification Engineer jobs in California?

The most popular types of Design Verification Engineer jobs in California are:

What are popular job titles related to Remote Design Verification Engineer jobs in California?

For Remote Design Verification Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Remote Design Verification Engineer jobs in California look for?

The top searched job categories for Remote Design Verification Engineer jobs in California are:

What cities in California are hiring for Remote Design Verification Engineer jobs?

Cities in California with the most Remote Design Verification Engineer job openings:

Remote Design Verification Engineer jobs near you
Infographic showing various Remote Design Verification Engineer job openings in California as of August 2026, with employment types broken down into 58% Full Time, and 42% Contract. Highlights an 100% Remote job distribution.

ASIC Engineer, Design Verification

Meta

Sunnyvale, CA • On-site, Remote

$146K/yr

Full-time

Re-posted 5 days ago

Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

139th of 247 rated software companies

Job description

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of an agile team working with experienced engineers across the industry, focused on developing ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
ASIC Engineer, Design Verification Responsibilities:
  • Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
  • Develop functional tests based on verification test plan
  • Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
  • Debug, root-cause and resolve functional failures in the design, partnering with the Design team
  • Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring design quality meets defined verification and coverage goals
  • Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification
  • 6+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments

Preferred Qualifications:
  • Experience working across and building relationships with cross-functional design, model and emulation teams
  • Experience with revision control systems like Mercurial(Hg), Git or SVN
  • Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
  • Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs
  • Track record of 'first-pass success' in ASIC development cycles
  • Experience with micro-architectural performance verification
  • Experience verifying GPU/CPU designs
  • Experience with verification of ARM/RISC-V based sub-systems or SoCs
  • Experience in development of UVM based verification environments from scratch
  • Experience with IP or integration verification of high-speed interfaces like PCIe, RoCE, DDR, HBM, Ethernet
  • Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$146,000/year to $209,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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