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Remote Design Verification Engineer Jobs in California

Flexible Work Schedules (Hybrid or Remote, when possible) * Wellness Program for Physical and ... Background checks include SSN/SIN validation, motor vehicle verification, education verification ...

Senior Nuclear Facility Engineer

Alameda, CA ยท On-site +1

$118K - $162K/yr

... remote handling, and manufacturing. * Perform design verification and validation activities to ensure system performance meets functional and safety requirements. * Participate in hazard and failure ...

... remote roles. Cornelis Networks is hiringa Senior ASIC Design Engineer to lead the design and ... Collaborate with IP vendors, architecture, verification, physical design, and software teams to ...

Senior Mechanical Engineer

San Jose, CA ยท On-site +1

$121K - $214K/yr

... design verification. Ability to work with a team is a must. Also, the ability to communicate effectively in a remote environment is a key requirement. Finally, being curious, a self-starter, and ...

Senior Mechanical Engineer

Agoura Hills, CA ยท On-site +1

$121K - $214K/yr

... design verification. Ability to work with a team is a must. Also, the ability to communicate effectively in a remote environment is a key requirement. Finally, being curious, a self-starter, and ...

SOC Integration Engineer

Mountain View, CA ยท Remote

$175K - $450K/yr

... for Design Verification (DV) purposes. * Leverage hands-on experience with AI-driven tools to ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

We partner closely with Product, Engineering, Consumer Insights, Data Science, and User Research to ... ABOUT YOU You'll lead a lean remote design organization of seasoned designers, while partnering ...

Integrate robotic and remote handling technologies (e.g., manipulators, cameras, cranes, etc.) into ... We are looking for a Hot Cell Design Engineer that is: * Passionate about clean energy, fuel ...

Integrate robotic and remote handling technologies (e.g., manipulators, cameras, cranes, etc.) into ... We are looking for a Hot Cell Design Engineer that is: * Passionate about clean energy, fuel ...

Mixed-Signal CMOS IC Design Engineer

Menlo Park, CA ยท On-site +1

$160K - $250K/yr

... engineers to accomplishing the goals. Key Responsibilities: * Design and development of mixed ... Implement and verify high-speed interconnects, Equalizers (CTLE/FFE/DFE, sample/hold), and other ...

Showing results 41-60

Remote Design Verification Engineer information

What are some common challenges faced by remote design verification engineers, and how can they be addressed?

Remote Design Verification Engineers often encounter challenges related to communication and collaboration, especially when working with global teams across different time zones. Maintaining clear and frequent communication through project management tools and regular video meetings is essential. Additionally, ensuring access to secure and reliable simulation environments can be a hurdle, so familiarity with remote access protocols and cloud-based verification tools is beneficial. Proactively documenting verification processes and results also helps keep everyone aligned and facilitates smoother project progress.

What are the key skills and qualifications needed to thrive as a remote design verification engineer?

To thrive as a Remote Design Verification Engineer, you need a solid background in digital design, verification methodologies (such as UVM or SystemVerilog), and a relevant engineering degree. Proficiency in simulation tools (like VCS or ModelSim), scripting languages (Python or Perl), and version control systems is typically required. Exceptional problem-solving abilities, attention to detail, and strong communication skills are crucial for effective collaboration in a remote environment. These competencies ensure accurate verification, efficient workflow, and high-quality deliverables in complex hardware development projects.

What is a remote design verification engineer?

Remote Design Verification Engineers are professionals who work from a remote location to ensure that hardware designs, such as integrated circuits or systems on a chip (SoC), function correctly according to their specifications. They use simulation and verification tools to test digital designs, identify bugs, and work closely with design teams to resolve issues. Their responsibilities often include writing test benches, developing verification plans, and automating tests to improve efficiency. This role requires a strong background in hardware description languages like Verilog or VHDL, as well as experience with verification methodologies such as UVM or SystemVerilog.

What is the difference between Remote Design Verification Engineer vs Remote Test Engineer?

AspectRemote Design Verification EngineerRemote Test Engineer
CredentialsBachelor's in Electrical Engineering, Computer Engineering, or related field; knowledge of verification toolsBachelor's in Electrical Engineering, Computer Engineering, or related field; testing certifications beneficial
Work EnvironmentDesign labs, simulation environments, collaboration with design teamsTesting labs, field testing, collaboration with verification teams
Industry UsageSemiconductors, integrated circuits, hardware design companiesElectronics, hardware manufacturing, embedded systems companies

The Remote Design Verification Engineer focuses on verifying hardware designs through simulation and analysis before manufacturing, ensuring design correctness. In contrast, the Remote Test Engineer primarily tests finished products or prototypes to validate functionality and performance. Both roles require technical expertise and collaboration but differ in their project stages and focus areas.

What are the most commonly searched types of Design Verification Engineer jobs in California? The most popular types of Design Verification Engineer jobs in California are:
What are popular job titles related to Remote Design Verification Engineer jobs in California? For Remote Design Verification Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Remote Design Verification Engineer jobs in California look for? The top searched job categories for Remote Design Verification Engineer jobs in California are:
What cities in California are hiring for Remote Design Verification Engineer jobs? Cities in California with the most Remote Design Verification Engineer job openings:
Infographic showing various Remote Design Verification Engineer job openings in California as of August 2026, with employment types broken down into 81% Full Time, and 19% Contract. Highlights an 100% Remote job distribution.

Lead ASIC RTL Design Engineer

4 Staffing Corp

San Francisco, CA โ€ข On-site, Remote

Full-time

This job post hasย expired today.ย Applications are no longer accepted.


Job description

About the job Lead ASIC RTL Design Engineer
Lead ASIC RTL Design Engineer - Remote (U.S.) - No visa sponsorship
Role Summary
Our client, a leader in AI Compute is seeking a senior-level ASIC design engineer to drive the development of high-performance silicon components used in advanced compute platforms. This individual will take ownership of key IP blocks from early architectural definition through RTL delivery and signoff, working closely with cross-functional teams to meet aggressive performance, power, and area goals. The role combines hands-on design work with technical leadership and mentorship.
Core Responsibilities
Architecture & RTL Development

  • Define microarchitecture for complex subsystems and document design specifications
  • Implement high-quality, reusable RTL in System Verilog with clear interface definitions and design intent
  • Incorporate assertions and design-for-debug features within RTL
Design Ownership & Implementation
  • Lead front-end design activities including linting, clock/reset domain analysis, and synthesis readiness
  • Collaborate with physical design teams on floor planning, timing closure, and implementation tradeoffs
  • Take responsibility for achieving performance, power, and area (PPA) targets for assigned blocks
High-Speed Interfaces & Memory Systems
  • Design and integrate high-bandwidth interfaces and interconnects (e.g., AMBA-based protocols, coherent fabrics)
  • Work on memory subsystem integration, including external DRAM and high-throughput memory solutions
  • Coordinate with internal teams and third-party IP providers to ensure proper integration and functionality
Engineering Processes & Tooling
  • Establish and maintain RTL design standards, reusable components, and signoff criteria
  • Contribute to automation and workflow improvements using scripting and build systems (Python, Tcl, CI pipelines)
Collaboration & System Integration
  • Partner with verification teams on test planning, coverage goals, and model alignment
  • Work with architecture and performance engineering to validate design intent against system-level expectations
  • Support silicon bring-up, debugging, and downstream customer or system integration efforts
Technical Leadership
  • Mentor less experienced engineers and provide guidance on design best practices
  • Lead design reviews and help drive key technical decisions across teams
  • Advocate for scalable, efficient, and high-quality engineering solutions
Basic Qualifications
  • Bachelor's or Master's degree in Electrical or Computer Engineering (or similar field)
  • 8+ years of experience in ASIC or SoC RTL design for complex, high-speed devices
  • Demonstrated experience delivering designs from concept through RTL implementation and tape out readiness
  • Strong System Verilog expertise, including clocking strategies, reset design, and domain crossing considerations
  • Hands-on experience with front-end design tools and flows (linting, CDC analysis, synthesis, timing analysis, DFT)
  • Familiarity with multiple high-speed technologies such as memory interfaces, interconnect protocols, or compute data paths
  • Strong communication skills with the ability to lead technical discussions and document designs clearly
Preferred Experience
  • Exposure to AI/ML hardware or high-performance compute architectures
  • Knowledge of formal verification techniques and assertion-based design
  • Experience with power optimization methods (e.g., clock gating, power intent formats like UPF/CPF)
  • Familiarity working alongside verification environments (UVM, Python-based frameworks, or similar)
  • Understanding of modern processor subsystems, coherence models, or custom tool flows