Physical Design Engineer
San Jose, CA · On-site +1
$159K - $164K/yr
Title: Physical Design Engineer Location: 100% Remote Duration: Long Term Contract role ... Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Minimum ...
San Jose, CA · On-site +1
$159K - $164K/yr
Title: Physical Design Engineer Location: 100% Remote Duration: Long Term Contract role ... Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Minimum ...
San Jose, CA · On-site +1
$159K - $164K/yr
Title: Physical Design Engineer Location: 100% Remote Duration: Long Term Contract role ... Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Minimum ...
San Jose, CA · On-site +1
... in ASIC/SoC design with a focus on PCIe controller integration. * Proven experience in silicon ... This is a remote position for employees residing within the United States. We offer a competitive ...
San Jose, CA · On-site +1
... in ASIC/SoC design with a focus on PCIe controller integration. * Proven experience in silicon ... This is a remote position for employees residing within the United States. We offer a competitive ...
Mountain View, CA · On-site +1
$175K - $362K/yr
The ASIC/SOC Physically Design CAD Engineer will be responsible for creating and maintaining our CA ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · On-site +1
$175K - $362K/yr
The ASIC/SOC Physically Design CAD Engineer will be responsible for creating and maintaining our CA ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · On-site +1
$175K - $362K/yr
... Engineering or equivalent * Minimum 8 years of industry experience in ASIC Physical Design * Great ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · On-site +1
$175K - $362K/yr
... Engineering or equivalent * Minimum 8 years of industry experience in ASIC Physical Design * Great ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Sunnyvale, CA · On-site +1
This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP ... S. preferred) degree in Electrical or Computer engineering. Tensordyne's culture was built on the ...
Sunnyvale, CA · On-site +1
This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP ... S. preferred) degree in Electrical or Computer engineering. Tensordyne's culture was built on the ...
San Jose, CA · On-site +1
S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles. Cornelis Networks is seeking talented Senior ASIC Design Engineers with deep ...
San Jose, CA · On-site +1
S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles. Cornelis Networks is seeking talented Senior ASIC Design Engineers with deep ...
Mountain View, CA · On-site +1
$175K - $450K/yr
Experience with ASIC low-power design techniques. * Experience performing RTL and gate-level power ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · On-site +1
$175K - $450K/yr
Experience with ASIC low-power design techniques. * Experience performing RTL and gate-level power ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Sunnyvale, CA · On-site +1
$146K/yr
ASIC Engineer, Design Verification Responsibilities ... Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub ...
Sunnyvale, CA · On-site +1
$146K/yr
ASIC Engineer, Design Verification Responsibilities ... Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub ...
Sunnyvale, CA · On-site +1
$114K/yr
Define and implement block, IP, and SoC-level verification plans to enable comprehensive functional coverage across design hierarchies * Develop and maintain UVM-based testbenches and functional test ...
Sunnyvale, CA · On-site +1
$114K/yr
Define and implement block, IP, and SoC-level verification plans to enable comprehensive functional coverage across design hierarchies * Develop and maintain UVM-based testbenches and functional test ...
Sunnyvale, CA · On-site +1
This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP ... Mentor and technically guide verification engineers helping them through test planning and ...
Sunnyvale, CA · On-site +1
This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP ... Mentor and technically guide verification engineers helping them through test planning and ...
Sunnyvale, CA · On-site +1
This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP ... Mentor and technically guide verification engineers helping them through test planning and ...
Sunnyvale, CA · On-site +1
This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP ... Mentor and technically guide verification engineers helping them through test planning and ...
San Francisco, CA · On-site +1
We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed ... Define overall SOC level verification strategy, technical planning, direction * Enable and drive ...
San Francisco, CA · On-site +1
We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed ... Define overall SOC level verification strategy, technical planning, direction * Enable and drive ...
Sunnyvale, CA · On-site +1
$178K/yr
ASIC Engineer, Design Verification Responsibilities ... Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub ...
Sunnyvale, CA · On-site +1
$178K/yr
ASIC Engineer, Design Verification Responsibilities ... Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub ...
San Jose, CA · On-site +1
Oversee definition, design, verification, and/or documentation for ASIC development. Determine ... SOC and system architecture; * Verilog, VHDL, and System Verilog; * Functional verification of ...
New
San Jose, CA · On-site +1
Oversee definition, design, verification, and/or documentation for ASIC development. Determine ... SOC and system architecture; * Verilog, VHDL, and System Verilog; * Functional verification of ...
New
Sunnyvale, CA · On-site +1
$178K/yr
ASIC Engineer, Power Management Design Verification Responsibilities ... Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub ...
Sunnyvale, CA · On-site +1
$178K/yr
ASIC Engineer, Power Management Design Verification Responsibilities ... Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub ...
Bodega Bay, CA · On-site +1
$230K - $322K/yr
This role is based onsite in San Diego, CA, Bay Area, CA or Austin, TX. A temporary remote work ... Collaborate with RFIC, mmWave, ASIC, Package Layout, and SoC architecture teams on package ...
Bodega Bay, CA · On-site +1
$230K - $322K/yr
This role is based onsite in San Diego, CA, Bay Area, CA or Austin, TX. A temporary remote work ... Collaborate with RFIC, mmWave, ASIC, Package Layout, and SoC architecture teams on package ...
San Diego, CA · On-site +1
$230K - $322K/yr
This role is based onsite in San Diego, CA, Bay Area, CA or Austin, TX. A temporary remote work ... Collaborate with RFIC, mmWave, ASIC, Package Layout, and SoC architecture teams on package ...
San Diego, CA · On-site +1
$230K - $322K/yr
This role is based onsite in San Diego, CA, Bay Area, CA or Austin, TX. A temporary remote work ... Collaborate with RFIC, mmWave, ASIC, Package Layout, and SoC architecture teams on package ...
Sunnyvale, CA · On-site +1
Hands-on ASIC engineering experience, that includes knowledge of VLSI/SoC chip design and verification workflows, with ASIC EDA tool suites from Synopsys and/or Cadence. * Knowledge of Linux system ...
Sunnyvale, CA · On-site +1
Hands-on ASIC engineering experience, that includes knowledge of VLSI/SoC chip design and verification workflows, with ASIC EDA tool suites from Synopsys and/or Cadence. * Knowledge of Linux system ...
Sunnyvale, CA · On-site +1
Headquartered in Sunnyvale, CA, and Munich, Germany, with remote team members across North America ... design engineers, ASIC design verification teams, SOC physical design teams, interdisciplinary ...
Sunnyvale, CA · On-site +1
Headquartered in Sunnyvale, CA, and Munich, Germany, with remote team members across North America ... design engineers, ASIC design verification teams, SOC physical design teams, interdisciplinary ...
Menlo Park, CA · On-site +1
$160K - $250K/yr
We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...
Menlo Park, CA · On-site +1
$160K - $250K/yr
We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...
For Remote Asic Soc Design Engineer jobs in California, the most frequently searched job titles are:
The top searched job categories for Remote Asic Soc Design Engineer jobs in California are:
Cities in California with the most Remote Asic Soc Design Engineer job openings:
$159K - $164K/yr
Full-time
Re-posted 24 days ago