ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of ...
ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of ...
We are seeking a highly skilled Flash Controller Design Engineer to contribute to the design and ... The ideal candidate will have strong experience in pre-silicon ASIC/SoC design , controller ...
We are seeking a highly skilled Flash Controller Design Engineer to contribute to the design and ... The ideal candidate will have strong experience in pre-silicon ASIC/SoC design , controller ...
ASIC/SoC Design Engineer, RTL design for SoC IPs
San Jose, CA · On-site
$145.60K/yr
As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro ... The ideal candidate is a seasoned ASIC/SOC designer with proven expertise across the entire chip ...
ASIC/SoC Design Engineer, RTL design for SoC IPs
San Jose, CA · On-site
$145.60K/yr
As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro ... The ideal candidate is a seasoned ASIC/SOC designer with proven expertise across the entire chip ...
As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro ... The ideal candidate is a seasoned ASIC/SOC designer with proven expertise across the entire chip ...
As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro ... The ideal candidate is a seasoned ASIC/SOC designer with proven expertise across the entire chip ...
The role involves overseeing and managing the lifecycle of ASIC/SoC design projects, ensuring they ... Develop detailed project timelines and allocate engineering resources across multi-site teams (e.g ...
New
The role involves overseeing and managing the lifecycle of ASIC/SoC design projects, ensuring they ... Develop detailed project timelines and allocate engineering resources across multi-site teams (e.g ...
New
ASIC Engineer
San Jose, CA · On-site
$194.60K/yr
... Design Engineer to join their growing team in San Jose. This role is ideal for engineers with ... Lead ASIC/SoC architecture and micro-architecture development from concept through production
Quick apply
ASIC Engineer
San Jose, CA · On-site
$194.60K/yr
... Design Engineer to join their growing team in San Jose. This role is ideal for engineers with ... Lead ASIC/SoC architecture and micro-architecture development from concept through production
ASIC Engineer
San Jose, CA · On-site
$192.90K/yr
... Design Engineer to join their growing team in San Jose. This role is ideal for engineers with ... Lead ASIC/SoC architecture and micro-architecture development from concept through production
ASIC Engineer
San Jose, CA · On-site
$192.90K/yr
... Design Engineer to join their growing team in San Jose. This role is ideal for engineers with ... Lead ASIC/SoC architecture and micro-architecture development from concept through production
SoC Design Engineer
Santa Clara, CA · On-site
$156.85K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
Santa Clara, CA · On-site
$156.85K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
ASIC RTL/SoC Design Engineer
San Jose, CA · On-site
$110K - $300K/yr
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
San Jose, CA · On-site
$110K - $300K/yr
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
San Jose, CA · On-site
$110K - $300K/yr
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
San Jose, CA · On-site
$110K - $300K/yr
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
Fremont, CA · On-site
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
Fremont, CA · On-site
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
SoC Design Engineer
Santa Clara, CA · On-site
$156.85K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
Santa Clara, CA · On-site
$156.85K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
$156.85K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
$156.85K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
Digital Design Engineer
Santa Clara, CA · On-site
$159.70K/yr
Digital Design Engineer Job Location: Santa Clara, CA (Onsite for 5 days a week) Job Type ... Able to actively participate during various phases of the ASIC/SOC design process -Architecture ...
Quick apply
Digital Design Engineer
Santa Clara, CA · On-site
$159.70K/yr
Digital Design Engineer Job Location: Santa Clara, CA (Onsite for 5 days a week) Job Type ... Able to actively participate during various phases of the ASIC/SOC design process -Architecture ...
SoC Design Engineer
Santa Clara, CA · On-site
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
Quick apply
SoC Design Engineer
Santa Clara, CA · On-site
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...
ASIC Design Engineer
Beaverton, OR · On-site
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:- Write microarchitecture and/or design specifications- Design, implement, and debug complex logic designs ...
ASIC Design Engineer
Beaverton, OR · On-site
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:- Write microarchitecture and/or design specifications- Design, implement, and debug complex logic designs ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...
ASIC Design Engineer
Beaverton, OR · On-site
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:- Write microarchitecture and/or design specifications- Design, implement, and debug complex logic designs ...
ASIC Design Engineer
Beaverton, OR · On-site
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:- Write microarchitecture and/or design specifications- Design, implement, and debug complex logic designs ...
ASIC RTL/SoC Design Engineer
Fremont, CA · On-site
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
Fremont, CA · On-site
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
Asic Soc Design Engineer information
See salary details
$94K - $103.8K
16% of jobs
$103.8K - $113.6K
3% of jobs
$113.6K - $123.5K
4% of jobs
$126.3K is the 25th percentile. Wages below this are outliers.
$123.5K - $133.3K
6% of jobs
The median wage is $139.4K / yr.
$133.3K - $143.1K
33% of jobs
$143.1K - $152.9K
3% of jobs
$152.9K - $162.7K
2% of jobs
$169.2K is the 75th percentile. Wages above this are outliers.
$162.7K - $172.5K
12% of jobs
$172.5K - $182.4K
5% of jobs
$182.4K - $192.2K
4% of jobs
$192.2K - $202K
12% of jobs
$94K
$150.2K
$202K
How much do asic soc design engineer jobs pay per year?
As of May 31, 2026, the average yearly pay for asic soc design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.
What is an ASIC SoC Design Engineer job?
An ASIC SoC Design Engineer is responsible for designing, developing, and verifying integrated circuits and system-on-chip (SoC) solutions. They work on various stages of chip development, including architecture specification, RTL coding, simulation, synthesis, and verification. Their role involves collaborating with hardware, software, and verification teams to optimize performance, power, and area. These engineers use hardware description languages like Verilog and VHDL, along with EDA tools for design and validation. The goal is to create efficient and high-performance ASIC or SoC solutions for applications like consumer electronics, networking, and AI.
What are the key skills and qualifications needed to thrive in the Asic Soc Design Engineer position, and why are they important?
To thrive as an ASIC SoC Design Engineer, a strong background in digital design, computer architecture, and electrical engineering—typically with a bachelor's or master's degree in a related field—is essential. Mastery of hardware description languages like Verilog or VHDL, experience with EDA tools (such as Synopsys or Cadence suites), and familiarity with verification methodologies are commonly required, often enhanced by relevant certifications. Soft skills such as problem-solving, collaboration, and effective communication are vital for interfacing with cross-functional teams and managing complex projects. These competencies enable efficient design cycles, high-quality silicon solutions, and successful integration within multidisciplinary engineering environments.
What are some typical challenges faced by ASIC SoC Design Engineers during a project?
ASIC SoC Design Engineers often encounter challenges such as balancing strict power, performance, and area constraints while meeting tight project deadlines. Debugging complex integration issues and staying aligned with evolving specifications requires strong analytical skills and close collaboration with verification, software, and systems teams. It's common to work in fast-paced, iterative development cycles where proactive problem-solving and adaptability are essential. Overcoming these challenges not only ensures successful chip design but also provides valuable learning opportunities and growth in technical expertise.
More about Asic Soc Design Engineer jobs
- What are some typical challenges faced by ASIC SoC Design Engineers during a project?
- What are the key skills and qualifications needed to thrive in the Asic Soc Design Engineer position and why are they important?
- What is an ASIC SoC Design Engineer job?
- The 10 Top Types Of Asic Soc Design Engineer Jobs
What cities are hiring for Asic Soc Design Engineer jobs? Cities with the most Asic Soc Design Engineer job openings:
What are the most commonly searched types of Asic Soc Design Engineer jobs? The most popular types of Asic Soc Design Engineer jobs are:
What job categories do people searching Asic Soc Design Engineer jobs look for? The top searched job categories for Asic Soc Design Engineer jobs are:
Job description
Title: ASIC/SoC RTL Design Engineer
Location: Palo Alto, CA (Or potentially Burlington, MA)
Length of Contract: 6 months+ (Temp-to-Perm)
Ideal Start: 6/1/2026
Responsibilities :
Own end-to-end design of complex SoC subsystems, driving architecture, RTL implementation, and tapeout. Focus on high-performance Datapath, PPA optimization, and cross-functional integration across silicon, firmware, and system teams.
Must haves:
- 8 12+ years in ASIC/SoC digital design with hands-on RTL ownership
- Strong SystemVerilog/Verilog RTL development (Datapath, control logic, state machines)
- Proven experience owning subsystems from architecture RTL tapeout
- Deep understanding of PPA tradeoffs, timing closure, clock/reset, and power-aware design
- Experience designing high throughput Datapath (buffering, arbitration, memory hierarchy)
- Background in advanced nodes ( 28nm) and cross-functional collaboration (verification, systems, firmware)
Pluses:
- Experience with compute-intensive pipelines (DSP, AI, beamforming, MAC Datapath)
- Exposure to sensor / imaging systems (e.g., ultrasound, data acquisition)
- Experience with programmable compute blocks (AI accelerators, MPUs, eFPGA)
About Oxford Global Resources
Sourced by ZipRecruiter
Oxford Global Resources delivers tailored solutions for any technical challenges you face using our partnership-first approach. We specialize in workforce mobilization, digital transformation, and modern enterprise. We are committed to providing you with The Right Talent. Right Now. In 1984, we started Oxford with a handful of employees in a converted schoolhouse in Reading, Massachusetts. The people that shape our organization are some of the best in the industry. They are dedicated to making an impact and are with you every step of the way. We strive to meet the most pressing needs, solve the most complex problems, and go beyond expectations for our clients and our consultants. Together, we drive great outcomes. Whether you’d like to join the thousands of professionals who trust Oxford to advance their careers or partner with us to solve a challenge your business is facing, contact us at any of our 35 global offices.
Industry
Recruiting and staffing services
Company size
501 - 1,000 Employees
Headquarters location
Beverly, MA, US
Year founded
1984