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Monday Through Friday Asic Soc Design Engineer Jobs

Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$156K - $160K/yr

Description Job Title: SoC Design Engineer Job Duties: Responsible for digital design and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and ... Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification ...

Senior ASIC Design Engineer Description - HP is the world's leading printing company. We are ... Very familiar with digital ASIC/SOC design flow from RTL to silicon characterization * Very ...

ASIC RTL/SoC Design Engineer

San Jose, CA ยท On-site

$110K - $300K/yr

Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Applications submitted through the ATS allow our hiring team to evaluate candidates using a ...

Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS ... Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS ... Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS ... Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...

We're building a tight-knit, experienced in-house team to drive engineering outcomes and partner with a Tier-1 ASIC design house through the process. As our Lead SoC Design Engineer, you will develop ...

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Monday Through Friday Asic Soc Design Engineer information

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$94K

$150.2K

$202K

How much do monday through friday asic soc design engineer jobs pay per year?

As of Sep 9, 2026, the average yearly pay for monday through friday asic soc design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

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ASIC Chip Lead and Design Engineer

Minneapolis, MN โ€ข On-site

$200 - $250/hr

Other

Posted 14 days ago


Job description

ASIC Chip Lead and Design Engineer Job Description:

You'll play a key role in designing and delivering complex, custom ASICs from concept through silicon. This is a highly hands-on opportunity for an engineer who enjoys solving challenging digital design problems and working across the full ASIC/SoC development flow. You'll collaborate closely with architecture, verification, physical design, applications, and business teams to turn demanding technical requirements into high-performance silicon while optimizing for power, performance, and area (PPA). The ideal candidate is a high-aptitude engineer who is currently designing complex digital blocks and has strong, practical experience across the complete ASIC/SoC design lifecycle. Engineers with additional experience in radiation-hardened design, analog/mixed-signal circuits, EDA methodologies, or standard-cell library development will have an opportunity to apply and expand that expertise. Beyond design, you'll help evaluate customer requirements, develop technical approaches and effort estimates for new opportunities, and influence improvements to internal design methodologies and processes.

Essential Duties and Qualifications:
  • Chip Architecture and Development:
    • Lead the architectural design of ASICs based on high-level requirements and block diagrams.
    • Collaborate with system architects to define chip functionality, interfaces, and performance targets.
    • Develop detailed specifications for the chip's components.
  • RTL Design and Synthesis:
    • Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.
    • Optimize RTL code for area, power, and performance.
    • Implement and verify complex digital blocks.
  • Constraint Development:
    • Develop timing constraints for the entire chip.
    • Work closely with physical design teams to ensure successful place-and-route.
  • RISC Processor Conformance:
    • Constrain and verify RISC processors within the chip.
    • Optimize processor performance and power efficiency.
  • Physical Design Collaboration:
    • Collaborate with physical design teams on floorplanning, placement, and routing.
    • Address any design closure issues.
  • Verification Support:
    • Work with verification engineers to ensure functional correctness.
    • Assist in creating testbenches and verifying the chipโ€™s functionality.
  • Modern revision-control tools and best-practices in a collaborative, multi-site design community.
  • Proficiency with UNIX/Linux incl. shell scripting, text utilities (e.g., sed, awk, grep), using Modules, high-level programming such as C/C++, PERL/Python/TCL scripting.
  • Proficiency with Windows apps, incl. Word, Excel, PowerPoint, Visio, Project, PDF conversion.
Required Qualifications:
  • BSEE/MSEE or equivalent
  • 10+ years of direct industry experience with ASIC and/or SoC design.
  • Proficiency in Synopsys Design Compiler and other EDA tools.
  • Strong understanding of digital design principles.
  • Familiarity with RISC architectures (e.g., ARM, MIPS).
  • Excellent problem-solving skills and attention to detail.
  • A strong background in RTL based digital IC design using Verilog/SystemVerilog.
  • Proven track record of first-pass successes.
  • A self-starter with the ability to assume leadership roles.
  • Ability to work well in a diverse team environment.
  • Willingness to mentor junior engineers.
  • Experience with industry standard development tools and methodologies.
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