Your expertise will span the entire chip design lifecycle, from conceptualization through ... ASIC/SoC design flow. Additional experience with radiation-hardened design, analog/mixed-signal ...
Your expertise will span the entire chip design lifecycle, from conceptualization through ... ASIC/SoC design flow. Additional experience with radiation-hardened design, analog/mixed-signal ...
ASIC Design Engineer
San Diego, CA · On-site
$99 - $148/hr
Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...
ASIC Design Engineer
San Diego, CA · On-site
$99 - $148/hr
Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...
ASIC Design Engineer
San Diego, CA · On-site
Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...
ASIC Design Engineer
San Diego, CA · On-site
Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design organization. Successful candidates will have the opportunity to contribute across a variety of projects ...
ASIC/SoC Design & Verification Engineer
$70 - $100/hr
... taken chips through tapeout, this opportunity allows you to apply your practical engineering ... Hands-on experience in ASIC and/or SoC design , functional verification, or digital hardware ...
ASIC/SoC Design & Verification Engineer
$70 - $100/hr
... taken chips through tapeout, this opportunity allows you to apply your practical engineering ... Hands-on experience in ASIC and/or SoC design , functional verification, or digital hardware ...
ASIC Engineer
San Jose, CA · On-site
$192K/yr
... Design Engineer to join their growing team in San Jose. This role is ideal for engineers with ... Lead ASIC/SoC architecture and micro-architecture development from concept through production
ASIC Engineer
San Jose, CA · On-site
$192K/yr
... Design Engineer to join their growing team in San Jose. This role is ideal for engineers with ... Lead ASIC/SoC architecture and micro-architecture development from concept through production
Senior ASIC Design Engineer
$116K - $182K/yr
Senior ASIC Design Engineer Description - HP is the world's leading printing company. We are ... Very familiar with digital ASIC/SOC design flow from RTL to silicon characterization * Very ...
Senior ASIC Design Engineer
$116K - $182K/yr
Senior ASIC Design Engineer Description - HP is the world's leading printing company. We are ... Very familiar with digital ASIC/SOC design flow from RTL to silicon characterization * Very ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
Santa Clara, CA · On-site
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
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SoC Design Engineer
Santa Clara, CA · On-site
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties ... Be responsible for digital design of ASIC cores within image sensor SoC products, including IP ...
Senior ASIC Design Verification Engineer
$130K - $170K/yr
Develop and execute verification plans for ASIC, SoC, subsystem, IP, and FPGA designs.* Build and ... Mentor junior engineers as appropriate through code reviews, debug support, and technical guidance.
Senior ASIC Design Verification Engineer
$130K - $170K/yr
Develop and execute verification plans for ASIC, SoC, subsystem, IP, and FPGA designs.* Build and ... Mentor junior engineers as appropriate through code reviews, debug support, and technical guidance.
Asic Chip Lead-Full Time- Onsite
Brooklyn Park, MN · On-site
$145K - $205K/yr
Bachelors/master's in electrical engineering/computer science or equivalent. * 10+ years of direct industry experience with ASIC and/or SoC design. * Proficiency in Synopsys Design Compiler and other ...
New
Asic Chip Lead-Full Time- Onsite
Brooklyn Park, MN · On-site
$145K - $205K/yr
Bachelors/master's in electrical engineering/computer science or equivalent. * 10+ years of direct industry experience with ASIC and/or SoC design. * Proficiency in Synopsys Design Compiler and other ...
New
ASIC Design Verification Engineer
$115K - $135K/yr
... through verification closure.Key Responsibilities* Support verification activities for ASIC, SoC ... Flexible 9/80 work schedule with every other Friday off* Competitive Comp & Benefits: Healthcare ...
ASIC Design Verification Engineer
$115K - $135K/yr
... through verification closure.Key Responsibilities* Support verification activities for ASIC, SoC ... Flexible 9/80 work schedule with every other Friday off* Competitive Comp & Benefits: Healthcare ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS ... Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS ... Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...
Design Verification Engineer
San Diego, CA · On-site
$144K - $176K/yr
Design Verification Engineer Location: Bay Area, CA (Onsite/Hybrid) Experience: 8+ Years Job ... Develop and execute comprehensive verification plans for ASIC/SoC designs. * Build reusable UVM ...
Design Verification Engineer
San Diego, CA · On-site
$144K - $176K/yr
Design Verification Engineer Location: Bay Area, CA (Onsite/Hybrid) Experience: 8+ Years Job ... Develop and execute comprehensive verification plans for ASIC/SoC designs. * Build reusable UVM ...
Experience with ASIC/SoC design and implementation flow is desired. Preferred Qualifications * Ph.D. in Electrical or Computer Engineering * Prior experience working with cryptography, signal ...
Experience with ASIC/SoC design and implementation flow is desired. Preferred Qualifications * Ph.D. in Electrical or Computer Engineering * Prior experience working with cryptography, signal ...
Principal ASIC Design Verification Engineer
$200K - $220K/yr
... through challenging verification efforts.Key Responsibilities ... Lead verification strategy, planning, and execution for complex ASIC, SoC, subsystem, IP, and FPGA ...
Principal ASIC Design Verification Engineer
$200K - $220K/yr
... through challenging verification efforts.Key Responsibilities ... Lead verification strategy, planning, and execution for complex ASIC, SoC, subsystem, IP, and FPGA ...
Lead SoC Design Engineer
Los Altos, CA · On-site
We're building a tight-knit, experienced in-house team to drive engineering outcomes and partner with a Tier-1 ASIC design house through the process. As our Lead SoC Design Engineer, you will develop ...
Lead SoC Design Engineer
Los Altos, CA · On-site
We're building a tight-knit, experienced in-house team to drive engineering outcomes and partner with a Tier-1 ASIC design house through the process. As our Lead SoC Design Engineer, you will develop ...
Monday Through Friday Asic Soc Design Engineer information
See salary details
$94K - $103.8K
16% of jobs
$103.8K - $113.6K
3% of jobs
$113.6K - $123.5K
4% of jobs
$126.3K is the 25th percentile. Wages below this are outliers.
$123.5K - $133.3K
6% of jobs
The median wage is $139.4K / yr.
$133.3K - $143.1K
33% of jobs
$143.1K - $152.9K
3% of jobs
$152.9K - $162.7K
2% of jobs
$169.2K is the 75th percentile. Wages above this are outliers.
$162.7K - $172.5K
12% of jobs
$172.5K - $182.4K
5% of jobs
$182.4K - $192.2K
4% of jobs
$192.2K - $202K
12% of jobs
$94K
$150.2K
$202K
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Cities with the most Monday Through Friday Asic Soc Design Engineer job openings:
What are the most commonly searched types of Asic Soc Design Engineer jobs?
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What states have the most Monday Through Friday Asic Soc Design Engineer jobs?
States with the most job openings for Monday Through Friday Asic Soc Design Engineer jobs include:
ASIC Chip Lead / Design Engineer
Brooklyn Park, MN • On-site
Other
Posted 4 days ago
Job description
As an ASIC Chip Lead and Design Engineer, you will play a pivotal role in the development of custom-designed Application-Specific Integrated Circuits (ASICs). Your expertise will span the entire chip design lifecycle, from conceptualization through implementation.
You will collaborate with cross-functional teams to ensure successful chip development while meeting performance, power, and area targets. The ideal candidate is a highly capable, hands-on engineer currently designing complex digital blocks with strong knowledge and experience across the complete ASIC/SoC design flow.
Additional experience with radiation-hardened design, analog/mixed-signal design and EDA, and standard-cell library development is highly desirable.
Additional responsibilities include evaluating customer requirements, estimating effort and expenses for potential new business, and identifying opportunities to improve internal design methodologies.
Essential Duties & ResponsibilitiesChip Architecture & Development-
Lead the architectural design of ASICs based on high-level requirements and block diagrams.
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Collaborate with system architects to define chip functionality, interfaces, and performance targets.
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Develop detailed specifications for chip components.
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Use Synopsys Design Compiler to create and synthesize RTL designs.
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Optimize RTL code for area, power, and performance.
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Implement and verify complex digital blocks.
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Develop timing constraints for the entire chip.
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Work closely with physical design teams to ensure successful place-and-route.
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Constrain and verify RISC processors within the chip.
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Optimize processor performance and power efficiency.
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Collaborate with physical design teams on floorplanning, placement, and routing.
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Address design closure issues throughout the development process.
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Work with verification engineers to ensure functional correctness.
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Assist with testbench development and verification of chip functionality.
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Utilize modern revision-control tools and best practices within a collaborative, multi-site design environment.
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Work proficiently within UNIX/Linux environments, including shell scripting and utilities such as sed, awk, and grep.
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Utilize high-level programming and scripting languages such as C/C++, Perl, Python, and Tcl.
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Work effectively with standard Windows applications, including Word, Excel, PowerPoint, Visio, and Project.
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Bachelor''s or Master''s degree in Electrical Engineering, Computer Science, or a related field.
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10+ years of direct industry experience in ASIC and/or SoC design.
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Strong background in RTL-based digital IC design using Verilog/SystemVerilog.
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Proficiency with Synopsys Design Compiler and other industry-standard EDA tools.
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Strong understanding of digital design principles and the complete ASIC/SoC design flow.
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Familiarity with RISC architectures, such as ARM or MIPS.
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Proven track record of first-pass silicon success.
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Excellent problem-solving skills and strong attention to detail.
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Self-starter with the ability to assume technical leadership responsibilities.
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Ability to work effectively within diverse, cross-functional engineering teams.
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Willingness and ability to mentor less experienced engineers.
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Experience with industry-standard development tools and methodologies.
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Radiation-hardened (rad-hard) ASIC design.
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Analog/mixed-signal design and EDA flows.
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Standard-cell library development.
About Technical Link
Sourced by ZipRecruiter
Industry
It services
Company size
1 - 10 Employees
Headquarters location
Los Angeles, CA, US
Year founded
2012