$134K - $164K/yr
The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead ... As a trusted domain expert, you will directly influence Intel's technical direction, mentor the ...
$134K - $164K/yr
The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead ... As a trusted domain expert, you will directly influence Intel's technical direction, mentor the ...
Santa Clara, CA · On-site
$159K - $195K/yr
The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead ... As a trusted domain expert, you will directly influence Intel's technical direction, mentor the ...
Santa Clara, CA · On-site
$159K - $195K/yr
The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead ... As a trusted domain expert, you will directly influence Intel's technical direction, mentor the ...
Hillsboro, OR · On-site
$148K - $180K/yr
The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead ... As a trusted domain expert, you will directly influence Intel's technical direction, mentor the ...
Hillsboro, OR · On-site
$148K - $180K/yr
The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead ... As a trusted domain expert, you will directly influence Intel's technical direction, mentor the ...
Santa Clara, CA · On-site
$141K - $200K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...
Santa Clara, CA · On-site
$141K - $200K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...
Austin, TX · On-site
$141K - $200K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...
Austin, TX · On-site
$141K - $200K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...
$141K - $200K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...
$141K - $200K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...
Santa Clara, CA · On-site
$159K - $195K/yr
The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead ... As a trusted domain expert, you will directly influence Intel's technical direction, mentor the ...
Santa Clara, CA · On-site
$159K - $195K/yr
The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead ... As a trusted domain expert, you will directly influence Intel's technical direction, mentor the ...
Austin, TX · On-site
$141K - $200K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...
Austin, TX · On-site
$141K - $200K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...
Folsom, CA · On-site
$145K - $177K/yr
About the Role As a Senior SoC Design Verification Engineer , you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intel's next generation of client computing and ...
Folsom, CA · On-site
$145K - $177K/yr
About the Role As a Senior SoC Design Verification Engineer , you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intel's next generation of client computing and ...
Santa Clara, CA · On-site
$159K - $195K/yr
About the Role As a Senior SoC Design Verification Engineer , you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intel's next generation of client computing and ...
Santa Clara, CA · On-site
$159K - $195K/yr
About the Role As a Senior SoC Design Verification Engineer , you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intel's next generation of client computing and ...
Santa Clara, CA · On-site
$150 - $200/hr
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs and partnering with experts in ASIC design, Physical Design, CAD, Package Design, Software, DFT ...
Santa Clara, CA · On-site
$150 - $200/hr
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs and partnering with experts in ASIC design, Physical Design, CAD, Package Design, Software, DFT ...
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...
Quick apply
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
Santa Clara, CA · On-site
$150 - $200/hr
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
Santa Clara, CA · On-site
$150 - $200/hr
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
$18.03 - $23.08
1% of jobs
$23.08 - $28.13
2% of jobs
$28.13 - $33.17
7% of jobs
$33.17 - $38.22
11% of jobs
$39.68 is the 25th percentile. Wages below this are outliers.
$38.22 - $43.27
14% of jobs
$43.27 - $48.32
15% of jobs
The median wage is $48.51 / hr.
$48.32 - $53.37
14% of jobs
$53.37 - $58.41
8% of jobs
$59.90 is the 75th percentile. Wages above this are outliers.
$58.41 - $63.46
12% of jobs
$63.46 - $68.51
12% of jobs
$68.51 - $73.56
5% of jobs
$18
$50
$73
| Aspect | Intel Soc Design Engineer | FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering; knowledge of SoC architecture | Bachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience |
| Work Environment | Semiconductor industry, hardware design labs, collaborative teams | Hardware development labs, FPGA prototyping environments |
| Employer & Industry Usage | Intel, semiconductor industry, integrated circuit design | Electronics companies, FPGA vendors, research labs |
The Intel SoC Design Engineer focuses on designing and integrating system-on-chip components for Intel's semiconductor products, emphasizing hardware architecture and integration. In contrast, the FPGA Design Engineer specializes in developing and implementing FPGA-based solutions, often for prototyping or custom hardware. Both roles require strong hardware design skills and collaborate within hardware development teams, but they differ in their specific focus areas and end products.
For Intel Soc Design Engineer jobs, the most frequently searched job titles are:
Austin, TX
$134K - $164K/yr
Full-time
Medical, Retirement, PTO
Re-posted 6 days ago
8.7
Based on 147 frontline employees who took The Breakroom Quiz
18th of 161 rated electronics manufacturers
The Role and Impact
We are seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification efforts for cutting-edge system-on-chip (SoC) designs. In this strategic role, you will define and implement scalable and reusable verification methodologies that ensure first-pass silicon success. As a trusted domain expert, you will directly influence Intel's technical direction, mentor the next generation of engineers, and drive innovation that strengthens Intel's leadership in the semiconductor industry. This position offers a tremendous opportunity to shape the quality and performance of Intel products, ensuring they meet and exceed the expectations of customers worldwide.
Key Responsibilities
- Architect and define end-to-end SoC verification strategies, including simulation, emulation, and formal verification approaches, to validate complex SoC designs.
- Develop and execute block, subsystem, and SoC-level verification plans, including test benches and coverage models, to ensure compliance with microarchitecture specifications.
- Lead verification closure for critical interfaces, including AXI, ACE, CHI, and interconnect fabrics.
- Collaborate with SoC architects, RTL designers, and firmware teams to define verification hooks, assertions, and coverage metrics.
- Oversee the integration of multiple IPs such as PCIe Gen6/7, DDR5/6, and Ethernet into the SoC environment, driving verification success.
- Define and promote reusable UVM-based verification methodologies and automation flows for improved team productivity.
- Lead emulation and performance modeling efforts, including co-verification of digital designs with firmware and architectural simulations using advanced platforms like Palladium and Veloce.
- Debug and root cause complex issues in pre-silicon environments, implementing corrective measures to ensure design functionality and performance.
- Provide expert guidance and mentorship to technical leads and design verification engineers, fostering a culture of continuous learning and improvement.
- Collaborate with post-silicon validation teams to incorporate learnings into future verification methodologies and infrastructure.
Minimum Qualifications
- Bachelor's or BS degree in Electrical Engineering, Computer Engineering, or a related field, with 12+ years of relevant experience;
-5+ years of people management experience
- Expertise in SystemVerilog and UVM/OVM verification methodologies.
- Comprehensive knowledge of SoC microarchitecture, including coherency protocols, cache subsystems, and interconnect fabrics.
- Proven experience with high-speed protocols such as PCIe, DDR, AXI, CHI, or NoC.
- Hands-on experience with emulation and prototyping platforms (e.g., Palladium, Veloce, FPGA-based) and formal verification tools.
- Demonstrated ability to develop and maintain verification environments, including scoreboards, monitors, and VIP integration.
Preferred Qualifications
Masters degree in Electrical Engineering, Computer Engineering +8 years work experience or PhD + 6 years in Electrical Engineering, Computer Engineering +6 years work experience
- Familiarity with power intent verification (UPF) and security verification techniques.
- Experience with AI/ML accelerators, custom interconnect fabrics, or SmartNIC technologies.
- Strong scripting skills (Python, Perl, or TCL) to automate verification flows and regressions.
- Proven ability to drive pre-silicon to post-silicon correlation for continuous improvement.
- Exceptional analytical, debugging, and technical leadership abilities, with a passion for driving innovation and excellence.
Join us and make a lasting impact on Intel's groundbreaking technologies and products.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968
