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Intel Soc Design Engineer Jobs (NOW HIRING)

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

... energy-efficient design and new technologies that transform the user experience at the product ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...

... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...

Showing results 41-60

Intel Soc Design Engineer information

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$18

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$73

How much do intel soc design engineer jobs pay per hour?

As of Sep 9, 2026, the average hourly pay for intel soc design engineer in the United States is $50.69, according to ZipRecruiter salary data. Most workers in this role earn between $39.18 and $61.78 per hour, depending on experience, location, and employer.

What is the difference between Intel Soc Design Engineer vs FPGA Design Engineer?

AspectIntel Soc Design EngineerFPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; knowledge of SoC architectureBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentSemiconductor industry, hardware design labs, collaborative teamsHardware development labs, FPGA prototyping environments
Employer & Industry UsageIntel, semiconductor industry, integrated circuit designElectronics companies, FPGA vendors, research labs

The Intel SoC Design Engineer focuses on designing and integrating system-on-chip components for Intel's semiconductor products, emphasizing hardware architecture and integration. In contrast, the FPGA Design Engineer specializes in developing and implementing FPGA-based solutions, often for prototyping or custom hardware. Both roles require strong hardware design skills and collaborate within hardware development teams, but they differ in their specific focus areas and end products.

What are popular job titles related to Intel Soc Design Engineer jobs?

For Intel Soc Design Engineer jobs, the most frequently searched job titles are:

Infographic showing various Intel Soc Design Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $105,435 per year, or $50.7 per hour.

SoC Design Engineer

Santa Clara, CA โ€ข On-site

OmniVision Technologies
Software Developmentย โ€ขย 1 - 5K employees

$110K - $140K/yr

Full-time

Re-posted 3 days ago


Job description

Responsibilities :
  • Image sensor control or processing function design and verification
  • High speed interface (USB/MIPI) design and verification
  • Full-chip integration and verification
  • Chip bring-up, validation, and debugging
  • Participate in the FPGA development
  • Architecture, registers, interface and design documentation.
Qualifications :
  • PhD or MSEE with some experience of digital design
  • Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality
  • Knowledge of high performance and low power design techniques.
  • Knowledge of FPGA and emulation platforms.
  • Knowledge of SOC architecture.
  • Knowledge of assertion-based formal verification is a plus
  • Image processing/DSP knowledge is a plus
Annual base salary for this role in California, US is expected to be between $110,600 - $140,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.
EOE/Minorities/Females/Vet/Disability