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Intel Soc Design Engineer Jobs (NOW HIRING)

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

OmniVision Technologies

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

NVIDIA Corporation

$150 - $200/hr

As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...

OmniVision Technologies

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

Anodize

Lead SoC Design Engineer

Los Altos, CA

As our Lead SoC Design Engineer, you will develop the microarchitecture, own the critical tradeoffs required to hit aggressive PPA targets, and spearhead the implementation of key subsystems.

Anodize

Lead SoC Design Engineer

Los Altos, CA · On-site

As our Lead SoC Design Engineer, you will develop the microarchitecture, own the critical tradeoffs required to hit aggressive PPA targets, and spearhead the implementation of key subsystems.

jobr.pro

Lead SoC Design Engineer

Los Altos, CA · On-site

$200 - $250/hr

As our Lead SoC Design Engineer, you will develop the microarchitecture, own the critical tradeoffs required to hit aggressive PPA targets, and spearhead the implementation of key subsystems.

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$125 - $150/hr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

Apple

Wireless SoC Design Engineer

Los Angeles, CA · On-site

... energy-efficient design and new technologies that transform the user experience at the product ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

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Intel Soc Design Engineer information

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How much do intel soc design engineer jobs pay per hour?

As of Sep 9, 2026, the average hourly pay for intel soc design engineer in the United States is $50.69, according to ZipRecruiter salary data. Most workers in this role earn between $39.18 and $61.78 per hour, depending on experience, location, and employer.

What is the difference between Intel Soc Design Engineer vs FPGA Design Engineer?

AspectIntel Soc Design EngineerFPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; knowledge of SoC architectureBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentSemiconductor industry, hardware design labs, collaborative teamsHardware development labs, FPGA prototyping environments
Employer & Industry UsageIntel, semiconductor industry, integrated circuit designElectronics companies, FPGA vendors, research labs

The Intel SoC Design Engineer focuses on designing and integrating system-on-chip components for Intel's semiconductor products, emphasizing hardware architecture and integration. In contrast, the FPGA Design Engineer specializes in developing and implementing FPGA-based solutions, often for prototyping or custom hardware. Both roles require strong hardware design skills and collaborate within hardware development teams, but they differ in their specific focus areas and end products.

What are popular job titles related to Intel Soc Design Engineer jobs?

For Intel Soc Design Engineer jobs, the most frequently searched job titles are:

Infographic showing various Intel Soc Design Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $105,435 per year, or $50.7 per hour.

SoC Design Engineer

Santa Clara, CA • On-site

OMNIVISION
Software Development • 1 - 5K employees
Learn more about OMNIVISIONexternal

Full-time

Re-posted 4 days ago

Job description

Job Title: SoC Design Engineer
 
Job Duties:  
 
Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical design teams on floor-planning, timing closure, and DFT implementation. Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and mixed-signal integration. Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline according to PRD/design specification and system architecture of SoC products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality verification, DFT, using Simvision, EDA tools such as Prime Time, cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc. Conduct design verification and modeling using SVA, Python, Perl, C++/C, and HLS. Work with digital and analog engineers for system design, integration and validation. Work with algorithm engineers for module level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co-simulation. Work with algorithm and application engineers for project-based microarchitecture improvements. Conduct silicon validation, debugging and tuning.
 
Requirements:
 
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or a related field.
 
Required skills and/or academic training in the following: 
 
  • Arithmetic circuit design related to general datapath circuits, ML and AI circuits.
  • Arithmetic circuit design, timing analysis; synchronous and asynchronous FSMs; power, test, and debug.
  • Design and design debug with System Verilog; Logic design and analysis.  
  • Processing Subsystem, including superscalar out-of-order cores, multicore and heterogeneous processors, and purpose-specific accelerators.  
  • Design tools, such as microarchitecture simulators, RTL synthesis tools, and modeling for area, power, and thermal. 
  • FPGA platforms to compute acceleration.  
  • FPGAs technology, architecture and applications.  
  • Register-Transfer Level (RTL) hardware design.  
  • Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks.  
  • Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal chip design.  
  • Full-chip integration and verification for tapeout.  
 
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.