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Soc Asic Development Engineer Jobs (NOW HIRING)

ASIC Design Engineer

San Diego, CA ยท On-site

$100 - $125/hr

Engineers in this role may work on different aspects of ASIC and SoC development, including architecture, RTL design, implementation, timing analysis, design methodology, automation, and siliconbring ...

ASIC Design Engineer

San Diego, CA ยท On-site

$100 - $125/hr

Engineers in this role may work on different aspects of ASIC and SoC development, including architecture, RTL design, implementation, timing analysis, design methodology, automation, and silicon ...

Engineers in this role may work on different aspects of ASIC and SoC development, including architecture, RTL design, implementation, timing analysis, design methodology, automation, and silicon ...

ASIC Engineer 5, 5219

Folsom, CA ยท On-site

$98.12 - $107.21/hr

ASIC Engineer 5 Duties: * Oversees definition, design, verification, and documentation for ASIC ... May also review vendor capability to support development. * SoC Arch * Architect to look into Full ...

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Soc Asic Development Engineer information

See salary details

$94K

$150.2K

$202K

How much do soc asic development engineer jobs pay per year?

As of Sep 9, 2026, the average yearly pay for soc asic development engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What are popular job titles related to Soc Asic Development Engineer jobs?

For Soc Asic Development Engineer jobs, the most frequently searched job titles are:

Infographic showing various Soc Asic Development Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 81% Full Time, 15% Part Time, and 3% Contract. Highlights an 92% Physical, 2% Hybrid, and 6% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.

ASIC Physical Design Engineer, Principal

Saint Paul, MN โ€ข On-site

$200K - $220K/yr

Other

Medical, Retirement, PTO

Re-posted 13 days ago


Job description

Position Description: At ForwardEdge ASIC we specialize in best-in-class ASIC technology, 100% domestically traceable microelectronic solutions designed for performance in commercial, aerospace, defense, and security sectors. FEASIC operates a full-scale ASIC design shop with cross-disciplinary fluency between digital logic, analog/mixed-signal design, and physical layout, and sits at the intersection of advanced ASIC, FPGA, and microelectronics design. As a wholly owned subsidiary of Lockheed Martin, we combine the agility of a startup with the stability and scale of a Fortune 100 leader. We operate in a nimble, fast-paced environment of 80+ highly experienced and specialized engineers with over 25 years of ASIC/FPGA experience and more than 300 patents. Position SummaryWe are looking for highly experienced ASIC Physical Design / Static Time Analysis (PD/STA) Engineer to work onsite in our St. Paul, MN office to support ASICs, IPs and Chiplet designs. This role is targeted at senior level candidates who can operate with a high degree of RTL2GDS PD implementation and sign-off for tape out.Key Responsibilities • Lead and collaborate with Analog, Verification, Logic and Physical design team members on all design implementation aspects from Synthesis to Tape-Out of various IPs, test chips and SoC/ASIC designs. • Lead with hands-on experience with synthesis, block and chip level implementation with industry standard PnR, STA and EMIR flows and tools• Lead end-to-end timing closure at block/chip levels including MCMM flows and ECO flows • Collaborate with cross functional teams to problem solve solutions across new and changing tools, flows and methodologies• Mentor junior and senior PD engineers through technical reviews, methodology guidance, and hands-on support.• Improve productivity through automation, infrastructure, and methodology enhancements.• Support project planning by identifying risks, tracking progress, and communicating status to technical and program leadership.Qualifications • BS in Electrical, Electronics, Computer Engineering, or 15 years of experience in related field or MS in Electrical, Electronics, Computer Engineering, or 12 years of experience in related field or Ph.D. with 8 years of experience in related field• Experience in advanced technology nodes and understanding of deep sub-micron design problems/solutions and ability to drive design closure in a fast-paced environment• Strong experience in SOC/ASIC design flows, tools and methodologies.• Knowledge of low power design flows such as power gating, multi-Vt, Voltage scaling techniques• Excellent understanding of logic design fundamentals and gate/transistor level implementation• Strong programming skills in Tcl/Perl/Shell/Python• Effective communicator with the ability to influence cross-functional teams.What We Offer• Work-Life Balance: Flexible 9/80 work schedule with every other Friday off• Competitive Comp & Benefits: Healthcare and medical coverage options, 401(k) retirement benefits with company contribution, generous holidays and PTO• Incentives: Eligibility for short-term and long-term incentive programsJoin ForwardEdge ASIC and be part of a team that thrives on innovation and excellence in ASIC design. Together, we build the technology that enables a safer, more resilient world. $200,000.00 - $220,000.00 Annually