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Senior Design Verification Engineer Jobs in California

Lorven Technologies

Design verification Engineer

San Jose, CA · On-site

$158K - $192K/yr

Design Verification Engineer Location: San Jose, CA We are seeking DV engineers to verify complex internal IP blocks such as compute engines, accelerators, and custom logic within SoC environments.

Redolent, Inc.

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...

iFlow Inc

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

Design Verification Engineer Location:Santa Clara CA Duration: Long term Experience:8-15 Years Description : Key Responsibilities: Strong understanding of SV and UVM and good debugging skills.

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

RD solutions

Design verification engineer

San Jose, CA · On-site

$159K - $194K/yr

Senior DV Engineer Who We Are: Quest Global delivers world-class end-to-end engineering solutions ... Key Responsibilities Design Verification of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals ...

Voltai

Design Verification Engineer

Palo Alto, CA · On-site

$150 - $210/hr

As a Senior Verification Engineer, your role isn't just verifying chips but redefining how teams ... Design and develop AI assisted workflows that accelerate verification, coverage closure, and debug.

Voltai

Design Verification Engineer

Palo Alto, CA · On-site

$159K - $195K/yr

As a Senior Verification Engineer, your role isn't just verifying chips but redefining how teams ... Design and develop AI assisted workflows that accelerate verification, coverage closure, and debug.

Voltai, Inc

Design Verification Engineer

Palo Alto, CA · On-site

$159K - $195K/yr

As a Senior Verification Engineer, your role isn't just verifying chips but redefining how teams ... Design and develop AI assisted workflows that accelerate verification, coverage closure, and debug.

indie

Design Verification Engineer

Aliso Viejo, CA · On-site

$145K - $177K/yr

As a Design Verification Engineer, you will be responsible for developing and executing comprehensive verification strategies for next-generation automotive camera video and vision processors. You ...

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Senior Design Verification Engineer information

See California salary details

$62.2K

$119.9K

$189K

How much do senior design verification engineer jobs pay per year?

As of Aug 8, 2026, the average yearly pay for senior design verification engineer in California is $119,875.00, according to ZipRecruiter salary data. Most workers in this role earn between $93,800.00 and $136,700.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a senior design verification engineer?

A Senior Design Verification Engineer requires deep expertise in digital design principles, verification methodologies (such as UVM or OVM), and a degree in electrical or computer engineering. Familiarity with hardware description languages (like Verilog or VHDL), simulation tools (e.g., Synopsys VCS, Cadence Incisive), and scripting languages (such as Python or TCL) is typically expected. Exceptional problem-solving, attention to detail, and strong communication skills help in collaborating with cross-functional teams and navigating complex verification challenges. These skills and qualifications are vital to ensure robust, high-quality hardware designs that meet performance and reliability standards.

How much does a senior design verification engineer make?

A senior design verification engineer typically earns between $100,000 and $150,000 annually, depending on experience, location, and industry. They often have expertise in hardware description languages like VHDL or Verilog and may hold certifications such as Certified Verification Engineer (CVE).

What is the difference between Senior Design Verification Engineer vs Design Verification Engineer?

AspectSenior Design Verification EngineerDesign Verification Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field; experience in verification tools and methodologiesBachelor's degree in Electrical Engineering, Computer Engineering, or related field; entry-level experience in verification
Work EnvironmentDesign teams, hardware/software verification labs, collaborative projectsVerification teams, testing labs, development environments
Employer & Industry UsageSemiconductor, electronics, hardware development companiesSimilar industries, often as entry or mid-level roles within verification teams

The main difference is experience level and responsibility. Senior Design Verification Engineers typically lead verification efforts, mentor junior staff, and handle complex verification tasks, while Design Verification Engineers focus on executing verification plans and testing designs under supervision. Both roles require similar technical skills and industry knowledge, but the senior role involves more leadership and strategic planning.

What is a senior design verification engineer?

Senior Design Verification Engineers are experienced professionals responsible for ensuring that hardware designs, such as integrated circuits or system-on-chip (SoC) components, meet all functional specifications and quality standards before manufacturing. They create and execute verification plans, develop testbenches, and use simulation tools to identify and resolve design issues. Their expertise helps prevent costly errors, ensuring reliable and functional products. Typically, they collaborate closely with design, validation, and product engineering teams and often mentor junior engineers.

What are some typical challenges faced by senior design verification engineers when working on complex chip designs?

Senior Design Verification Engineers often encounter challenges such as managing verification of increasingly complex and large-scale integrated circuits, ensuring comprehensive coverage, and identifying hard-to-find corner-case bugs. They frequently collaborate across cross-functional teams, including design, firmware, and test engineering, to clarify specifications and resolve issues. Effective communication and a proactive approach to debugging and process improvement are critical, as is keeping up with evolving verification methodologies and tools to ensure high-quality, on-time project delivery.
What are the most commonly searched types of Design Verification Engineer jobs in California? The most popular types of Design Verification Engineer jobs in California are:
What are popular job titles related to Senior Design Verification Engineer jobs in California? For Senior Design Verification Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Senior Design Verification Engineer jobs in California look for? The top searched job categories for Senior Design Verification Engineer jobs in California are:
What cities in California are hiring for Senior Design Verification Engineer jobs? Cities in California with the most Senior Design Verification Engineer job openings:
Senior Design Verification Engineer jobs near you
Infographic showing various Senior Design Verification Engineer job openings in California as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $119,875 per year, or $57.6 per hour.

Design verification Engineer

Lorven Technologies

San Jose, CA • On-site

$158K - $192K/yr

Full-time

Re-posted 4 days ago

Job description

Job Title: Design Verification Engineer
Location: San Jose, CA
Job Description:
We are seeking DV engineers to verify complex internal IP blocks such as compute engines, accelerators, and custom logic within SoC environments.
Key Responsibilities:
  • Develop and maintain UVM-based verification environments
  • Create test plans, testcases, and coverage models
  • Perform functional verification of RTL designs
  • Debug RTL and testbench issues
  • Drive coverage closure (functional + code)

Required Skills:
  • Strong hands-on with SystemVerilog and UVM
  • Experience in block-level verification
  • Good understanding of digital design fundamentals
  • Experience with debug tools (Verdi, DVE, etc.)

Good to Have:
Exposure to low-power verification (UPF)
Experience with AMBA protocols (AXI/AHB/APB)
Lorven technologies logo

About Lorven technologies

Sourced by ZipRecruiter

Lorven Technologies, headquartered in Plainsboro, New Jersey, United States, is a reputable company in the technology industry, specializing in providing effective IT solutions and consulting services. The company's official website, lorventech.com, offers comprehensive insights into its offerings which include but are not limited to software development, IT consulting, project management, and business analysis. Since its inception, Lorven Technologies has been committed to ensuring efficiency and reliability in delivering IT services to its global clientele, establishing itself as a trusted name in the industry.

Industry

It services

Company size

51 - 200 Employees

Headquarters location

Plainsboro, NJ, US

Year founded

2001

Social media

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