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Soc Design Verification Engineer Jobs (NOW HIRING)

As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...

... verification from an architecture and/or design specification to production silicon * Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for ...

... verification from an architecture and/or design specification to production silicon * Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for ...

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

Design Verification Engineer Location: San Jose, CA Experience: 8+ Years Type: Contract Description ... Key Skills Required · 8+ years of Design Verification experience in semiconductor/ASIC/SoC ...

New

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineer ID: 1063 Location: Austin, TX More about this job > Description Design ... Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC ...

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineer ID: 1058 Location: Austin, TX More about this job > Description Design ... Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Are you an experienced Design Verification Engineer with strong SystemVerilog (SV) & UVM expertise ... system & SoC Level VerificationVerification Testbench Development ✅ Functional Test ...

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Design Verification Engineer

Sunnyvale, CA

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Showing results 41-60

Soc Design Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do soc design verification engineer jobs pay per year?

As of Aug 7, 2026, the average yearly pay for soc design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What are some common challenges faced by a SoC Design Verification Engineer during the verification process?

SoC Design Verification Engineers often encounter challenges related to the increasing complexity of modern system-on-chip architectures, such as integrating numerous IP blocks and ensuring robust communication between them. Debugging failures in large-scale simulations and managing tight project deadlines can also be demanding. Additionally, adapting to evolving verification methodologies and tools, as well as collaborating effectively with design and firmware teams to resolve issues quickly, are common aspects of the role. Successful engineers leverage strong problem-solving skills and proactive communication to navigate these challenges.

What are the key skills and qualifications needed to thrive as a SoC Design Verification Engineer, and why are they important?

To thrive as an SoC Design Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical or computer engineering. Familiarity with hardware description languages (HDL) like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, problem-solving abilities, and effective communication skills help in collaborating with design teams and troubleshooting complex issues. These skills and qualities are vital to ensure the reliability, functionality, and timely delivery of complex system-on-chip products.

What is a SoC Design Verification Engineer?

SoC (System-on-Chip) Design Verification Engineers are professionals who ensure that integrated circuits, which combine multiple components onto a single chip, function correctly according to their specifications. They use various verification methodologies and tools to simulate, test, and debug the design before it is manufactured. Their work involves creating testbenches, running simulation tests, and collaborating with design engineers to identify and resolve issues early in the development cycle. This helps prevent costly errors and ensures the final product meets quality and performance standards.

What is the difference between Soc Design Verification Engineer vs Soc Validation Engineer?

AspectSoc Design Verification EngineerSoc Validation Engineer
Primary FocusVerifying design correctness through simulation and testing during developmentValidating the final product to ensure it meets specifications and functions in real-world scenarios
Work EnvironmentDesign teams, simulation labs, hardware testingProduct testing, field testing, customer environments
Required CredentialsBachelor's or master's in Electrical Engineering, VLSI, or related fields; knowledge of verification toolsBachelor's or master's in Electrical Engineering, VLSI, or related fields; experience with testing methodologies

The Soc Design Verification Engineer primarily focuses on verifying the design correctness during development, while the Soc Validation Engineer tests the final product to ensure it functions correctly in real-world conditions. Both roles require similar educational backgrounds and industry experience, but their responsibilities differ in the development lifecycle.

More about Soc Design Verification Engineer jobs
What cities are hiring for Soc Design Verification Engineer jobs? Cities with the most Soc Design Verification Engineer job openings:
What states have the most Soc Design Verification Engineer jobs? States with the most job openings for Soc Design Verification Engineer jobs include:
What job categories do people searching Soc Design Verification Engineer jobs look for? The top searched job categories for Soc Design Verification Engineer jobs are:
Infographic showing various Soc Design Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 62% Full Time, and 38% Contract. Highlights an 87% In-person, and 13% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

Wireless SOC Verification Engineer

Apple

Irvine, CA

$175K - $308K/yr

Full-time

Medical, Dental, Retirement

Re-posted 2 days ago


Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers


Job description

“Be the change you want to see in the world.” The brand new, Apple designed Wireless/Bluetooth chips are at the heart of Networking in the newest iPhones. As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team integrates multiple sophisticated IP level DV environments, craft highly reusable best-in-class UVM Testbenches, implement effective coverage driven and directed test cases, deploy new AI tools, and implement methodologies to improve quality of tape-out readiness. By collaborating with other product development groups across Apple, you can push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world!
Description
You will learn all aspects of a large-scale SOC, different types of SOC architectures, high speed layered protocols, low-power driven architecture, and best-in-class DV methodology. You will gain knowledge on Wireless protocols, FW-HW interactions, and complexities of multi-chip SOC debug architecture. As a Design Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible for crafting and productizing state of the art Wireless SOCs. This position comes with responsibility for pre-silicon RTL verification of block and top-level SOC, all aspects of SOC Design Verification engineering, and will enable you to thrive in a dynamic multi-functional organization, debate ideas openly, and deliver on complex Wireless protocol chip requirements.","responsibilities":"Understand details of High Efficiency SOC Architecture, standard SOC peripherals such as PCIE, CPUs and multi-processor systems, Power Management and Low-Power schemes, DMA, DDR, PCIe, Memory Controller Subsystems, USB, PLL, power up, Secured Boot schemes.
Deliver on Power Management designs using low-power methodologies and power up-down scenarios using UPF simulations.
Create coverage driven verification plans from specifications, review and refine to achieve coverage targets.
Architect UVM based highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches and test suites to SOC level.
Achieve targeted coverage, work with design, architecture, SW, FW and external IP delivery teams to efficiently integrate and verify overall SOC design.
Work closely with DV methodology architects to improve verification metrics.
Preferred Qualifications
Dedicated/hands-on ASIC & SOC DV experience.
Experience taping out large SOC systems with embedded processor cores.
Hands-on verification experience of PCIe, Bus Fabric, NOC, AHB, AXI, based bus architecture in UVM environment.
Experience with Formal Verification.
In-depth knowledge and experience working with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification.
Low Power Verification experience.
Should be a great teammate with excellent communication and problem-solving skills and the desire to seek diverse challenges.
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience.
Proven track record of working full ASIC cycle from concept to tape-out to bring-up, including test-planning, testbench implementation, test sequence creation and debugging, and coverage closure.
Expertise in SystemVerilog coding and UVM methodology
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,000 and $308,500, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976