Senior ASIC/SoC Design Verification Engineer (Chip-Level Verification) An outstanding, full-time opening is available in Silicon Valley, CA for an experienced ASIC/SoC Design Verification Engineer ...
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Senior ASIC/SoC Design Verification Engineer (Chip-Level Verification) An outstanding, full-time opening is available in Silicon Valley, CA for an experienced ASIC/SoC Design Verification Engineer ...
Principal SoC Design Verification Engineer
Richardson, TX · On-site
$153K - $265K/yr
Seeking a Senior System-on-Chip Design Verification engineer to verify the High-Performance Data ... Understanding of SOC interconnects and bus standards such as AXI, AHB, APB. * Excellent analytical ...
Principal SoC Design Verification Engineer
Richardson, TX · On-site
$153K - $265K/yr
Seeking a Senior System-on-Chip Design Verification engineer to verify the High-Performance Data ... Understanding of SOC interconnects and bus standards such as AXI, AHB, APB. * Excellent analytical ...
ASIC/SoC Design Verification Engineer
San Jose, CA · On-site
$110K - $300K/yr
Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification * Build and maintain infrastructure/environment for automation ...
ASIC/SoC Design Verification Engineer
San Jose, CA · On-site
$110K - $300K/yr
Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification * Build and maintain infrastructure/environment for automation ...
ASIC/SoC Design Verification Engineer
San Jose, CA · On-site
$110K - $300K/yr
Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification * Build and maintain infrastructure/environment for automation ...
ASIC/SoC Design Verification Engineer
San Jose, CA · On-site
$110K - $300K/yr
Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification * Build and maintain infrastructure/environment for automation ...
Principal SoC Design Verification Engineer
Richardson, TX · On-site
$153K - $265K/yr
Seeking a Senior System-on-Chip Design Verification engineer to verify the High-Performance Data ... Understanding of SOC interconnects and bus standards such as AXI, AHB, APB. * Excellent analytical ...
Principal SoC Design Verification Engineer
Richardson, TX · On-site
$153K - $265K/yr
Seeking a Senior System-on-Chip Design Verification engineer to verify the High-Performance Data ... Understanding of SOC interconnects and bus standards such as AXI, AHB, APB. * Excellent analytical ...
Wireless SOC Verification Engineer
$175K - $308K/yr
As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...
Wireless SOC Verification Engineer
$175K - $308K/yr
As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...
Wireless SOC Verification Engineer
$175K - $308K/yr
As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...
Wireless SOC Verification Engineer
$175K - $308K/yr
As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...
Wireless SOC Verification Engineer
$175K - $308K/yr
As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...
Wireless SOC Verification Engineer
$175K - $308K/yr
As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...
Principal SoC Design Verification Engineer
Austin, TX · On-site
$153K - $265K/yr
Seeking a Senior System-on-Chip Design Verification engineer to verify the High-Performance Data ... Understanding of SOC interconnects and bus standards such as AXI, AHB, APB. * Excellent analytical ...
Principal SoC Design Verification Engineer
Austin, TX · On-site
$153K - $265K/yr
Seeking a Senior System-on-Chip Design Verification engineer to verify the High-Performance Data ... Understanding of SOC interconnects and bus standards such as AXI, AHB, APB. * Excellent analytical ...
SoC Design Verification Engineer
Mountain View, CA · On-site
$175K - $362K/yr
... verification from an architecture and/or design specification to production silicon * Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for ...
SoC Design Verification Engineer
Mountain View, CA · On-site
$175K - $362K/yr
... verification from an architecture and/or design specification to production silicon * Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for ...
SoC Design Verification Engineer
Mountain View, CA · On-site +1
$175K - $362K/yr
... verification from an architecture and/or design specification to production silicon * Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for ...
SoC Design Verification Engineer
Mountain View, CA · On-site +1
$175K - $362K/yr
... verification from an architecture and/or design specification to production silicon * Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for ...
Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
Design Verification Engineer ID: 1063 Location: Austin, TX More about this job > Description Design ... Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC ...
Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
Design Verification Engineer ID: 1063 Location: Austin, TX More about this job > Description Design ... Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC ...
Design Verification Engineer
$134K - $164K/yr
Design Verification Engineer ID: 1058 Location: Austin, TX More about this job > Description Design ... Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC ...
Design Verification Engineer
$134K - $164K/yr
Design Verification Engineer ID: 1058 Location: Austin, TX More about this job > Description Design ... Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC ...
Custom Circuits Design Verification Engineer
$134K - $164K/yr
Design Verification Engineers at Apple are responsible for verifying the functionality and ... In this highly visible role, you will be at the center of a SoC design effort collaborating with ...
Custom Circuits Design Verification Engineer
$134K - $164K/yr
Design Verification Engineers at Apple are responsible for verifying the functionality and ... In this highly visible role, you will be at the center of a SoC design effort collaborating with ...
Custom Circuits Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
Design Verification Engineers at Apple are responsible for verifying the functionality and ... In this highly visible role, you will be at the center of a SoC design effort collaborating with ...
Custom Circuits Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
Design Verification Engineers at Apple are responsible for verifying the functionality and ... In this highly visible role, you will be at the center of a SoC design effort collaborating with ...
Design verification Engineer
Allentown, PA · On-site
$134K - $163K/yr
Role- Design verification Engineer Location - Allentown, PA Duration - Full-time Visa Status - US ... Minimum Qualifications: • 5+ years of related industry experience in ASIC/SOC verification • ...
Design verification Engineer
Allentown, PA · On-site
$134K - $163K/yr
Role- Design verification Engineer Location - Allentown, PA Duration - Full-time Visa Status - US ... Minimum Qualifications: • 5+ years of related industry experience in ASIC/SOC verification • ...
Design Verification Engineer
$159K - $194K/yr
Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...
Design Verification Engineer
$159K - $194K/yr
Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...
Design Verification Engineer
Sunnyvale, CA · On-site
$159K - $194K/yr
Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...
Design Verification Engineer
Sunnyvale, CA · On-site
$159K - $194K/yr
Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...
Design Verification Engineer(On-Site)
Sunnyvale, CA · On-site
$161K - $197K/yr
Responsibilities: · Define and implement IP/SoC verification plans, build verification test ... Design Verification Engineer. · Hands-on experience in Verilog, System Verilog, C/C++ based ...
New
Design Verification Engineer(On-Site)
Sunnyvale, CA · On-site
$161K - $197K/yr
Responsibilities: · Define and implement IP/SoC verification plans, build verification test ... Design Verification Engineer. · Hands-on experience in Verilog, System Verilog, C/C++ based ...
New
Design verification Engineer
San Jose, CA · On-site
$158K - $192K/yr
Job Title: Design Verification Engineer Location: San Jose, CA We are seeking DV engineers to ... within SoC environments. Key Responsibilities: * Develop and maintain UVM-based verification ...
Design verification Engineer
San Jose, CA · On-site
$158K - $192K/yr
Job Title: Design Verification Engineer Location: San Jose, CA We are seeking DV engineers to ... within SoC environments. Key Responsibilities: * Develop and maintain UVM-based verification ...
Soc Design Verification Engineer information
See salary details
$105.5K - $111.1K
0% of jobs
$111.1K - $116.7K
0% of jobs
$116.7K - $122.3K
0% of jobs
$122.3K - $127.9K
0% of jobs
$127.9K - $133.5K
0% of jobs
$135.6K is the 25th percentile. Wages below this are outliers.
$133.5K - $139K
65% of jobs
$139K - $144.6K
0% of jobs
$144.6K - $150.2K
0% of jobs
$150.2K - $155.8K
0% of jobs
$155.8K - $161.4K
0% of jobs
$163K is the 75th percentile. Wages above this are outliers.
$161.4K - $167K
35% of jobs
$105.5K
$149.2K
$167K
How much do soc design verification engineer jobs pay per year?
As of Jul 17, 2026, the average yearly pay for soc design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.
What are some common challenges faced by SoC Design Verification Engineers during the verification process?
SoC Design Verification Engineers often encounter challenges related to the increasing complexity of modern system-on-chip architectures, such as integrating numerous IP blocks and ensuring robust communication between them. Debugging failures in large-scale simulations and managing tight project deadlines can also be demanding. Additionally, adapting to evolving verification methodologies and tools, as well as collaborating effectively with design and firmware teams to resolve issues quickly, are common aspects of the role. Successful engineers leverage strong problem-solving skills and proactive communication to navigate these challenges.
What are the key skills and qualifications needed to thrive as a SoC Design Verification Engineer, and why are they important?
To thrive as an SoC Design Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical or computer engineering. Familiarity with hardware description languages (HDL) like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, problem-solving abilities, and effective communication skills help in collaborating with design teams and troubleshooting complex issues. These skills and qualities are vital to ensure the reliability, functionality, and timely delivery of complex system-on-chip products.
What are SoC Design Verification Engineers?
SoC (System-on-Chip) Design Verification Engineers are professionals who ensure that integrated circuits, which combine multiple components onto a single chip, function correctly according to their specifications. They use various verification methodologies and tools to simulate, test, and debug the design before it is manufactured. Their work involves creating testbenches, running simulation tests, and collaborating with design engineers to identify and resolve issues early in the development cycle. This helps prevent costly errors and ensures the final product meets quality and performance standards.
What is the difference between Soc Design Verification Engineer vs Soc Validation Engineer?
| Aspect | Soc Design Verification Engineer | Soc Validation Engineer |
|---|---|---|
| Primary Focus | Verifying design correctness through simulation and testing during development | Validating the final product to ensure it meets specifications and functions in real-world scenarios |
| Work Environment | Design teams, simulation labs, hardware testing | Product testing, field testing, customer environments |
| Required Credentials | Bachelor's or master's in Electrical Engineering, VLSI, or related fields; knowledge of verification tools | Bachelor's or master's in Electrical Engineering, VLSI, or related fields; experience with testing methodologies |
The Soc Design Verification Engineer primarily focuses on verifying the design correctness during development, while the Soc Validation Engineer tests the final product to ensure it functions correctly in real-world conditions. Both roles require similar educational backgrounds and industry experience, but their responsibilities differ in the development lifecycle.
More about Soc Design Verification Engineer jobs
What cities are hiring for Soc Design Verification Engineer jobs? Cities with the most Soc Design Verification Engineer job openings:
What states have the most Soc Design Verification Engineer jobs? States with the most job openings for Soc Design Verification Engineer jobs include:
What job categories do people searching Soc Design Verification Engineer jobs look for? The top searched job categories for Soc Design Verification Engineer jobs are:
Job description
Senior ASIC/SoC Design Verification Engineer (Chip-Level Verification)
An outstanding, full-time opening is available in Silicon Valley, CA for an experienced ASIC/SoC Design Verification Engineer with deep expertise in chip-level verification of complex SoCs and multi-IP integrated systems.
This role requires proven experience owning end-to-end pre-silicon verification from planning through coverage closure and tapeout readiness in a high-performance engineering environment. This is a fully onsite role (5 days/week) in the South Bay Area. Compensation up to $225K DOE + strong benefits + long-term project stability
All candidates MUST have the following experiences to qualify for consideration:
- 8+ years of ASIC/SoC Design Verification experience with significant chip-level verification exposure
- Extensive chip-level / full SoC verification ownership, including planning, execution, and closure of verification for complex multi-IP SoCs
- Strong hands-on experience developing and maintaining SystemVerilog/UVM-based verification environments, including drivers, monitors, scoreboards, sequences, agents, and coverage models
- Experience defining and executing verification plans (vPlan) and coverage-driven verification strategies
- Strong expertise in functional, code, assertion (SVA), and toggle coverage closure
- Hands-on experience with debugging RTL and verification environments, including root-cause failure analysis
- Experience with regression planning, execution, and failure triage at chip-level scale
- Strong experience with AMBA protocols (AXI, AHB, APB) and multi-IP subsystem integration
- Experience with industry-standard simulators such as Synopsys VCS, Cadence Xcelium, or Siemens Questa
- Experience developing test cases, checkers, scoreboards, and coverage models
- Experience collaborating with Design, Architecture, Firmware, and Post-Silicon teams
- Experience collaborating closely with Design, Architecture, Firmware, and Post-Silicon teams
- Proven experience supporting successful ASIC/SoC tapeouts
- Bachelor’s or Master’s Degree in Electrical Engineering, Computer Science, or related field
- Must be able to work onsite 5 days/week in Silicon Valley
If interested and QUALIFIED, please send resume in Microsoft Word format to: krissid@etechhi.com
Etech Hi, Inc. is an equal opportunity employer/staffing firm and we are committed to providing a workplace free from harassment and discrimination. We celebrate the unique differences of our employees and candidates because that is what drives curiosity, innovation, and the success of our business. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, gender identity or expression, age, marital status, veteran status, disability status, pregnancy, parental status, genetic information, political affiliation, or any other status protected by the laws or regulations in the locations where we operate.
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About Etech Hi
Sourced by ZipRecruiter
Industry
Recruiting and staffing services
Company size
11 - 50 Employees
Headquarters location
Temecula, CA, US
Year founded
2000