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Remote Asic Design Engineer Jobs in Oregon (NOW HIRING)

Senior ASIC Design Verification Engineer

OR · On-site +1

$170K - $250K/yr

The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...

Principal ASIC Design Verification Engineer

OR · On-site +1

$190K - $285K/yr

The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

Senior ASIC Physical Design Engineer

OR · On-site +1

$170K - $250K/yr

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...

Senior ASIC Emulation Engineer

OR · On-site +1

$170K - $250K/yr

You will work closely with architecture, RTL design, DFT, DV, firmware, physical design, and ... the ASIC organization. * Work with RTL engineers to compile, map, and optimize designs for ...

Principal ASIC Physical Design Engineer

OR · On-site +1

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

Senior FPGA Prototyping Engineer

OR · On-site +1

$120K - $225K/yr

Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to ... Qualifications * BS or MS in Electrical Engineering, Computer Engineering, or related field. * 5+ ...

The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive ... The complexity of the clocks and resets design has increased many folds. This requires ...

Armada needs an Electrical Design Engineer to work directly under the Senior Electrical Design ... This role is remote. What You'll Do (Key Responsibilities) * Develop and maintain electrical ...

Staff RFIC Design Engineer

Hillsboro, OR · On-site +1

$144K - $187K/yr

Switch/LNA/RF IC Design Engineer, the design of GaAs/SOI/SiGe/CMOS based switch and LNA or RFIC ... Experience supporting remote engineering teams. * Be able to work independently, communicate well ...

New

Staff RFIC Design Engineer

Bend, OR · On-site +1

$144K - $187K/yr

Switch/LNA/RF IC Design Engineer, the design of GaAs/SOI/SiGe/CMOS based switch and LNA or RFIC ... Experience supporting remote engineering teams. * Be able to work independently, communicate well ...

New

In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical ... Perform substrate breakout patterns for ASIC packages. * Optimize package pinout incorporating ...

Senior GPU Architect

OR · On-site +1

$129K - $175K/yr

Computer Science, Computer Engineering or Electrical Engineering) or equivalent experience. * 3+ years of relevant computer architecture, ASIC design/verification, or software development experience.

Senior SCADA Engineer, Design (Remote)

OR · On-site +1

$104K - $143K/yr

Assigned SCADA design, programming, and commissioning tasks are completed accurately and on ... recruiter. #LI-Remote Job Number: J13743 If you're interested in a meaningful career with a ...

Senior Formal Verification Engineer - LPU

OR · On-site +1

$104K - $143K/yr

Verify AI-related sophisticated ASIC designs & features with formal verification methods. * Multi ... Partner with architecture/RTL teams to specify properties, resolve deep design issues, and ...

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Remote Asic Design Engineer information

What is a remote ASIC design engineer?

A Remote ASIC Design Engineer is a professional who designs Application-Specific Integrated Circuits (ASICs) while working remotely, often from home or another location outside of a traditional office. They are responsible for creating and verifying digital or analog circuit designs tailored to specific applications, such as telecommunications, automotive, or consumer electronics. These engineers use specialized hardware description languages (HDLs) like Verilog or VHDL and collaborate with teams using online tools for simulation, synthesis, and verification. Remote ASIC Design Engineers must have strong technical skills and the ability to communicate and coordinate effectively in a virtual work environment.

What are the key skills and qualifications needed to thrive as a remote ASIC design engineer?

To thrive as a Remote ASIC Design Engineer, you need a solid background in digital circuit design, Verilog or VHDL programming, and a degree in electrical or computer engineering. Familiarity with EDA tools like Synopsys, Cadence, or Mentor Graphics, as well as experience in simulation, synthesis, and verification processes, is typically required. Strong problem-solving skills, effective communication, and the ability to collaborate virtually are standout soft skills for remote success. These competencies ensure efficient design cycles, high-quality deliverables, and seamless teamwork in distributed engineering environments.

What are some common challenges faced by remote ASIC design engineers, and how can they be effectively managed?

Remote ASIC Design Engineers often encounter challenges such as coordinating across multiple time zones, ensuring effective communication with hardware and verification teams, and maintaining access to high-performance computing resources. To overcome these hurdles, it’s essential to use collaborative project management tools, establish clear communication protocols, and schedule regular sync meetings. Additionally, many companies provide secure remote access to lab resources and simulation tools, helping engineers stay productive and connected with their teams.

What is the difference between Remote Asic Design Engineer vs Remote FPGA Design Engineer?

AspectRemote Asic Design EngineerRemote FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, FPGA/ASIC design experienceBachelor's/Master's in Electrical Engineering or Computer Engineering, FPGA/ASIC design experience
Work EnvironmentDesigning integrated circuits for manufacturing, often in semiconductor companiesDeveloping programmable logic designs, often in research or product development teams
Industry UsageSemiconductor, consumer electronics, automotiveTelecommunications, aerospace, embedded systems

Both roles require similar educational backgrounds and design experience, but the Remote Asic Design Engineer focuses on creating chips for mass production, while the Remote FPGA Design Engineer works on programmable logic devices. Their work environments and industry applications differ, aligning with their specific design goals.

What are the most commonly searched types of Asic Design Engineer jobs in Oregon?

The most popular types of Asic Design Engineer jobs in Oregon are:

What job categories do people searching Remote Asic Design Engineer jobs in Oregon look for?

The top searched job categories for Remote Asic Design Engineer jobs in Oregon are:

What cities in Oregon are hiring for Remote Asic Design Engineer jobs?

Cities in Oregon with the most Remote Asic Design Engineer job openings:

Infographic showing various Remote Asic Design Engineer job openings in Oregon as of August 2026, with employment types broken down into 86% Full Time, 8% Part Time, and 6% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution.

Senior ASIC Design Verification Engineer

K2 Space

OR • On-site, Remote

$170K - $250K/yr

Full-time

Medical, Dental, Vision, Life, PTO

Re-posted 12 days ago


Job description

The Role 

We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon. 

Responsibilities 

  • Develop and execute verification plans for block-level, subsystem-level, and full-chip environments. Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.
  • Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.
  • Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.
  • Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.
  • Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.
  • Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.
  • Participate in design reviews, microarchitecture discussions, and influence design-for-verification (DFV) best practices.
  • Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers to ensure end-to-end coverage and test.
  • Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis.
  • Participate in ASIC team interviews.
  • Contribute to advancement of DV methodologies and improvements.
  • Engage external IP providers and verification partners when needed. 

Qualifications 

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of experience in ASIC/SoC verification.
  • Solid understanding of SystemVerilog, digital logic, RTL design, and hardware verification flows.
  • Proficiency with a simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tool, and scripting languages (ex: Python, Perl, TCL).
  • Experience with testplanning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions.
  • Experience with regression management, coverage analysis, revision control (Git), and CI/CD automation.
  • Understanding of several industry-standard interfaces (ex: APB/AHB/AXI).
  • Familiarity with embedded processor-based designs and firmware/bare metal coding (ex: C, C++). 

Nice to Have

  • Experience with developing and integrating reference models.
  • Understanding of low power verification.
  • Familiarity with gate-level simulation and analog behavioral models.
  • Involvement in post-silicon validation planning and execution.
  • Experience working in cross-functional, geographically distributed teams.
  • Experience in space, telecom, or RF/digital mixed systems is a plus. 

Compensation and Benefits:

  • Base salary range for this role is $170,000 - $250,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

K2 Space logo

About K2 Space

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Los Angeles, CA, US

Year founded

2022