We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
Custom Circuits Design Engineer
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
Custom Circuits Design Engineer
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
Custom Circuits Design Engineer
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
Custom Circuits Design Engineer
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Analog and Mixed Signal Design Engineer
Hillsboro, OR · On-site
$164K - $269K/yr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Analog and Mixed Signal Design Engineer
Hillsboro, OR · On-site
$164K - $269K/yr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Analog and Mixed Signal Design Engineer
$164K - $269K/yr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Analog and Mixed Signal Design Engineer
$164K - $269K/yr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross ... D. in Electrical Engineering, Physics, or a closely related field * Experience inscripting and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross ... D. in Electrical Engineering, Physics, or a closely related field * Experience inscripting and ...
Experience in memory circuit design (SRAM/DRAM/FLASH/ROM/OPT, etc) * Experience in programming language (C/C++/Phyton) or scripting language (Perl/Python) * Ability to develop Verilog/Verilog-A ...
Experience in memory circuit design (SRAM/DRAM/FLASH/ROM/OPT, etc) * Experience in programming language (C/C++/Phyton) or scripting language (Perl/Python) * Ability to develop Verilog/Verilog-A ...
Hardware Engineer II
$127K - $168K/yr
Design and develop digital hardware circuits Integrating embedded processors, switch ASICs, DDR4 or ... SRAM, and supporting digital logic * Create schematics and guide PCB layout with attention to ...
Quick apply
Hardware Engineer II
$127K - $168K/yr
Design and develop digital hardware circuits Integrating embedded processors, switch ASICs, DDR4 or ... SRAM, and supporting digital logic * Create schematics and guide PCB layout with attention to ...
Proficiency in design rule development, validation, and waiver management processes. * Strong ... SRAM, Standard cells and be the key interface and bridge between Process Integration , Yield ...
Proficiency in design rule development, validation, and waiver management processes. * Strong ... SRAM, Standard cells and be the key interface and bridge between Process Integration , Yield ...
Director - PDK Architecture
Hillsboro, OR · On-site
... design rules, PDK scope are defined and closed prior to execution ... Drive technology closure and readiness assessments across Logic, SRAM, AMS, APR, Reliability, and ...
Director - PDK Architecture
Hillsboro, OR · On-site
... design rules, PDK scope are defined and closed prior to execution ... Drive technology closure and readiness assessments across Logic, SRAM, AMS, APR, Reliability, and ...
Sram Design Engineer information
See Oregon salary details
$19.06 - $24.40
1% of jobs
$24.40 - $29.74
2% of jobs
$29.74 - $35.07
7% of jobs
$35.07 - $40.41
11% of jobs
$41.95 is the 25th percentile. Wages below this are outliers.
$40.41 - $45.75
14% of jobs
$45.75 - $51.08
15% of jobs
The median wage is $51.29 / hr.
$51.08 - $56.42
14% of jobs
$56.42 - $61.76
8% of jobs
$63.34 is the 75th percentile. Wages above this are outliers.
$61.76 - $67.10
12% of jobs
$67.10 - $72.43
12% of jobs
$72.43 - $77.77
5% of jobs
$19
$53
$77
How much do sram design engineer jobs pay per hour?
As of Jul 26, 2026, the average hourly pay for sram design engineer in Oregon is $53.59, according to ZipRecruiter salary data. Most workers in this role earn between $41.44 and $65.34 per hour, depending on experience, location, and employer.
What are the key skills and qualifications needed to thrive in the Sram Design Engineer position, and why are they important?
To thrive as a Sram Design Engineer, a strong background in electrical engineering, VLSI design, and semiconductor device physics—often supported by a relevant bachelor’s or master’s degree—is essential. Expertise in industry-standard EDA tools like Cadence, Synopsys, and Mentor Graphics, as well as experience with HDL languages such as Verilog or VHDL, is typically required. Attention to detail, problem-solving skills, and the ability to communicate effectively with cross-functional teams are important soft skills for the role. These skills ensure high-quality SRAM design, efficient collaboration, and the ability to meet both performance and reliability targets in advanced integrated circuits.
What are the typical daily responsibilities of a Sram Design Engineer?
As a Sram Design Engineer, your daily tasks often include designing and verifying static random-access memory (SRAM) circuits, running simulations to validate performance, and troubleshooting design issues. You’ll collaborate closely with layout engineers, verification teams, and other design engineers to optimize memory architectures and ensure compliance with power, area, and timing specifications. Additionally, you may attend design reviews, document design methodologies, and interact with foundries during tape-out or silicon validation phases. This role frequently involves both independent technical work and teamwork within a multidisciplinary environment focused on delivering high-performance semiconductor products.
What is an SRAM Design Engineer job?
An SRAM Design Engineer is responsible for designing Static Random-Access Memory (SRAM) circuits used in semiconductor chips. They focus on optimizing performance, power consumption, and area efficiency while ensuring reliable functionality. Their work includes transistor-level design, layout, simulation, and verification of SRAM cells, sense amplifiers, and peripheral circuits. They collaborate with process engineers and digital designers to integrate SRAM into larger systems. Strong knowledge of VLSI design, circuit theory, and semiconductor technology is essential for this role.
What are popular job titles related to Sram Design Engineer jobs in Oregon? For Sram Design Engineer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Sram Design Engineer jobs in Oregon look for? The top searched job categories for Sram Design Engineer jobs in Oregon are:
What cities in Oregon are hiring for Sram Design Engineer jobs? Cities in Oregon with the most Sram Design Engineer job openings:
Apple rating
8.0
Based on 675 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
Do you have a passion for crafting entirely new solutions? Do you love building without precedent? As part of our Digital group, you'll take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Your efforts will be groundbreaking, often literally. Join us, and you'll help design the tools that allow us to bring customers experiences they've never before envisioned. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low power SOC.
Description
Imagine yourself at the center of our SOC design effort, collaborating with all fields, with a critical impact and playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers. You will perform the following - - Develop custom circuits to improve chip power efficiency. - Work with power team, PD and architects to define specifications and requirements - Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation / margin verification across PVT, statistical design, functional verification and silicon bring up.
- Work closely with layout team to complete the design and oversee the layout quality.
- Develop / drive circuit methodology to achieve the highest design quality metrics.
Minimum Qualifications
BS and a minimum of 3 years of relevant industry experience
Preferred Qualifications
We are looking for applicants with design experience in advanced technology nodes.
- Experience in design of low voltages / low power custom circuits.
- Experience in one or multiple of the following areas is highly desirable: Machine learning accelerators, SRAM circuits, non-volatile memories, weak / moderate inversion circuits, ultra-low power amplifiers, DC/DC converters, digital on-chip sensors, high speed clocking, time to digital converters (TDCs).
- Deep understanding of deep submicron device physics, leakage mechanisms, technology interactions with device behavior.
- Solid understanding of device matching, device noise sources (1/f, thermal), extrinsic noise sources (supply, jitter), and their impact on high precision circuit.
- Ability to conduct experiments during silicon debug, gathering and analyzing data; and utilize scripting to support efficient handling of ATE data.
- Familiar with mixed signal verification and behavioral models for mixed signal blocks.
- Proficiency in scripting languages (Python /Perl or others) and CAD automation tools.
- Knowledge of industry standard circuit and design tools.
Description
Imagine yourself at the center of our SOC design effort, collaborating with all fields, with a critical impact and playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers. You will perform the following - - Develop custom circuits to improve chip power efficiency. - Work with power team, PD and architects to define specifications and requirements - Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation / margin verification across PVT, statistical design, functional verification and silicon bring up.
- Work closely with layout team to complete the design and oversee the layout quality.
- Develop / drive circuit methodology to achieve the highest design quality metrics.
Minimum Qualifications
BS and a minimum of 3 years of relevant industry experience
Preferred Qualifications
We are looking for applicants with design experience in advanced technology nodes.
- Experience in design of low voltages / low power custom circuits.
- Experience in one or multiple of the following areas is highly desirable: Machine learning accelerators, SRAM circuits, non-volatile memories, weak / moderate inversion circuits, ultra-low power amplifiers, DC/DC converters, digital on-chip sensors, high speed clocking, time to digital converters (TDCs).
- Deep understanding of deep submicron device physics, leakage mechanisms, technology interactions with device behavior.
- Solid understanding of device matching, device noise sources (1/f, thermal), extrinsic noise sources (supply, jitter), and their impact on high precision circuit.
- Ability to conduct experiments during silicon debug, gathering and analyzing data; and utilize scripting to support efficient handling of ATE data.
- Familiar with mixed signal verification and behavioral models for mixed signal blocks.
- Proficiency in scripting languages (Python /Perl or others) and CAD automation tools.
- Knowledge of industry standard circuit and design tools.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976