Beaverton, OR · On-site
$120 - $180/hr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... Experience in C or C++ programming * Experience using an interpretive language such as Perl or ...
Beaverton, OR · On-site
$120 - $180/hr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... Experience in C or C++ programming * Experience using an interpretive language such as Perl or ...
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... programming Experience using an interpretive language such as Perl or Python
Beaverton, OR · On-site
$140 - $210/hr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on‑chip sensors, ML accelerators data path) used in a high performance / low ...
Beaverton, OR · On-site
$140 - $210/hr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on‑chip sensors, ML accelerators data path) used in a high performance / low ...
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
$150K - $277K/yr
We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
Hillsboro, OR · On-site
$122.44 - $232.19/hr
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Hillsboro, OR · On-site
$122.44 - $232.19/hr
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering ... Design, characterization, and verification of custom memory circuits such as SRAM, Register Files ...
Hillsboro, OR · On-site
$164K - $269K/yr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Hillsboro, OR · On-site
$164K - $269K/yr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Hillsboro, OR · On-site
$164 - $269/hr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Hillsboro, OR · On-site
$164 - $269/hr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Hillsboro, OR · On-site
$164K - $269K/yr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Hillsboro, OR · On-site
$164K - $269K/yr
... SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High ... Work closely with process and IP engineers to anticipate AMS IP requirements and use design and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross ... D. in Electrical Engineering, Physics, or a closely related field * Experience inscripting and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross ... D. in Electrical Engineering, Physics, or a closely related field * Experience inscripting and ...
$19.12 - $24.47
1% of jobs
$24.47 - $29.83
2% of jobs
$29.83 - $35.18
7% of jobs
$35.18 - $40.53
11% of jobs
$42.08 is the 25th percentile. Wages below this are outliers.
$40.53 - $45.89
14% of jobs
$45.89 - $51.24
15% of jobs
The median wage is $51.45 / hr.
$51.24 - $56.59
14% of jobs
$56.59 - $61.95
8% of jobs
$63.53 is the 75th percentile. Wages above this are outliers.
$61.95 - $67.30
12% of jobs
$67.30 - $72.65
12% of jobs
$72.65 - $78.01
5% of jobs
$19
$53
$78
An SRAM Design Engineer is responsible for designing Static Random-Access Memory (SRAM) circuits used in semiconductor chips. They focus on optimizing performance, power consumption, and area efficiency while ensuring reliable functionality. Their work includes transistor-level design, layout, simulation, and verification of SRAM cells, sense amplifiers, and peripheral circuits. They collaborate with process engineers and digital designers to integrate SRAM into larger systems. Strong knowledge of VLSI design, circuit theory, and semiconductor technology is essential for this role.
As a Sram Design Engineer, your daily tasks often include designing and verifying static random-access memory (SRAM) circuits, running simulations to validate performance, and troubleshooting design issues. You’ll collaborate closely with layout engineers, verification teams, and other design engineers to optimize memory architectures and ensure compliance with power, area, and timing specifications. Additionally, you may attend design reviews, document design methodologies, and interact with foundries during tape-out or silicon validation phases. This role frequently involves both independent technical work and teamwork within a multidisciplinary environment focused on delivering high-performance semiconductor products.
To thrive as a Sram Design Engineer, a strong background in electrical engineering, VLSI design, and semiconductor device physics—often supported by a relevant bachelor’s or master’s degree—is essential. Expertise in industry-standard EDA tools like Cadence, Synopsys, and Mentor Graphics, as well as experience with HDL languages such as Verilog or VHDL, is typically required. Attention to detail, problem-solving skills, and the ability to communicate effectively with cross-functional teams are important soft skills for the role. These skills ensure high-quality SRAM design, efficient collaboration, and the ability to meet both performance and reliability targets in advanced integrated circuits.
The most popular types of Sram Design Engineer jobs in Portland, OR are:
For Sram Design Engineer jobs in Portland, OR, the most frequently searched job titles are:
The top searched job categories for Sram Design Engineer jobs in Portland, OR are:
$120 - $180/hr
Other
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Computer and electronic product manufacturing
10,000+ Employees
Cupertino, CA, US
1976
