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Asic Development Engineer Jobs in Raleigh, NC (NOW HIRING)

Nvidia

Senior ASIC Verification Engineer

Durham, NC · Hybrid

NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and ... Define the verification scope, and contribute to the development of the verification infrastructure ...

Nvidia

Senior ASIC Timing Engineer

Durham, NC · On-site

NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... Experience in methodology and/or flow development as well as automation. NVIDIA is widely ...

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Asic Development Engineer information

See Raleigh, NC salary details

$47.6K

$93.5K

$149.2K

How much do asic development engineer jobs pay per year?

As of Jun 18, 2026, the average yearly pay for asic development engineer in Raleigh, NC is $93,470.00, according to ZipRecruiter salary data. Most workers in this role earn between $77,300.00 and $103,500.00 per year, depending on experience, location, and employer.

What engineer makes $500,000 a year?

An experienced ASIC Development Engineer working in high-demand industries such as semiconductor design or advanced chip development can earn $500,000 or more annually, especially with seniority, specialized skills, and performance bonuses. Such roles often require expertise in hardware description languages, verification tools, and a strong understanding of integrated circuit design.

What is the difference between Asic Development Engineer vs FPGA Design Engineer?

AspectAsic Development EngineerFPGA Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design toolsBachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools
Work EnvironmentDesigning and verifying custom silicon chips in semiconductor labs or R&D centersDeveloping and testing FPGA-based solutions in hardware labs or embedded systems environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and tech giantsCommon in telecommunications, aerospace, and embedded systems industries

While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as ASIC development, software engineering, or data science can earn $300,000 or more annually, especially with extensive experience, advanced skills, and working in high-demand industries or companies. These roles often require advanced degrees, certifications, and expertise in tools like FPGA, VHDL, or Verilog, along with leadership responsibilities.

Are ASIC engineers in demand?

ASIC development engineers are in high demand due to the growth of industries like consumer electronics, telecommunications, and automotive systems that require custom integrated circuits. Skills in hardware description languages such as VHDL or Verilog, along with experience in FPGA prototyping, enhance employability in this field.

How much do ASIC engineers get paid?

ASIC development engineers typically earn between $80,000 and $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills or certifications can earn higher salaries, often exceeding $180,000. Compensation may also include bonuses and stock options in some organizations.
What are popular job titles related to Asic Development Engineer jobs in Raleigh, NC? For Asic Development Engineer jobs in Raleigh, NC, the most frequently searched job titles are:
What job categories do people searching Asic Development Engineer jobs in Raleigh, NC look for? The top searched job categories for Asic Development Engineer jobs in Raleigh, NC are:
Asic Development Engineer jobs near you
Senior Principal Engineer, Design Verification

Senior Principal Engineer, Design Verification

Marvell Technology, Inc.

Morrisville, NC • On-site

Full-time

Life, Retirement

Posted 9 days ago

Job description

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell's CXL Product Development team works on groundbreaking innovations for the composable datacenter. We are looking for individuals with a deep understanding and passion for ASIC verification to craft creative solutions for DV architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. If you're creative and autonomous, we want to hear from you! At Marvell, you will have the opportunity to shape some of the most incredible products to address the needs of the next generation datacenters.
What You Can Expect
As a member of a dynamic ASIC development team, the candidate will be responsible for leading verification architecture, execution, delivery, post silicon validation , emulation of the next generation ASICs under development working closely with cross functional teams. The member will also have an opportunity to leverage the experience to drive the ASIC front end ASIC development process, emulation, PSV, tools and methodologies leading to the successful ASIC products.
What We're Looking For
  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 20+ years of related professional experience.
  • Master's degree in Computer Science, Electrical Engineering or related fields with 18+ years of experience.PhD in Computer Science, Electrical Engineering or related fields with 12+ years of experience.
  • Strong understanding of ASIC development process, tools and verification methodologies.
  • Demonstrated track record of leading verification and delivery high quality ASICs.
  • Hands-on experience in verification of multiple SoC architectures, processor cores, memory subsystems and peripheral interfaces.
  • Hands-on experience of bringing up multiple ASICs in the lab.
  • Hands-on experience in driving emulation efforts leading to successful tapeout
  • Proven ability of leading ASIC development teams.
  • Excellent communication, interpersonal and presentation skills.
  • Strong cross-functional leadership skills.
  • Highly motivated, self-driven and ability to drive adoption of new methodologies.

Expected Base Pay Range (USD)
184,400 - 272,950, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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