DFT Engineer
Lansing, MI · On-site
$120 - $190/hr
We are seeking an experienced DFT Engineer to join a high‑performing ASIC/SoC engineering team. In this role, you will be responsible for designing and implementing Design‑for‑Test (DFT ...
New
Lansing, MI · On-site
$120 - $190/hr
We are seeking an experienced DFT Engineer to join a high‑performing ASIC/SoC engineering team. In this role, you will be responsible for designing and implementing Design‑for‑Test (DFT ...
New
Lansing, MI · On-site
$120 - $190/hr
We are seeking an experienced DFT Engineer to join a high‑performing ASIC/SoC engineering team. In this role, you will be responsible for designing and implementing Design‑for‑Test (DFT ...
New
Dearborn, MI · On-site
$113K - $190K/yr
You will provide executive guidance on the integration of PMIC, ASIC, and SoC technologies, driving the roadmap for custom silicon and System-in-Package (SiP) solutions to optimize power density ...
Dearborn, MI · On-site
$113K - $190K/yr
You will provide executive guidance on the integration of PMIC, ASIC, and SoC technologies, driving the roadmap for custom silicon and System-in-Package (SiP) solutions to optimize power density ...
| Aspect | Asic Soc | FPGA Designer |
|---|---|---|
| Required Skills | Hardware design, embedded systems, VHDL/Verilog, ASIC development | Hardware description languages, FPGA architecture, VHDL/Verilog |
| Work Environment | Semiconductor companies, integrated circuit design labs | Electronics firms, prototyping labs, FPGA development environments |
| Industry Usage | Consumer electronics, automotive, telecommunications | Prototyping, testing, low-volume production |
Both Asic Soc and FPGA Designer roles involve hardware description languages and embedded systems, but Asic Soc engineers focus on designing integrated circuits for mass production, while FPGA Designers work on flexible, reprogrammable hardware for testing and prototyping. The skills overlap makes them common choices for hardware development in electronics industries.
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Cities in Michigan with the most Asic Soc job openings:
Location: Santa Clara, CA (Onsite)
Employment Type: Long‑Term Contract
Interview Process: Virtual Interviews
Compensation: Based on Experience (DOE)
Engagement: ANY
Preference: Local candidates or those able to work onsite.
We are seeking an experienced DFT Engineer to join a high‑performing ASIC/SoC engineering team.
In this role, you will be responsible for designing and implementing Design‑for‑Test (DFT) solutions that ensure high manufacturing quality, test coverage, and efficient production testing for complex semiconductor devices.
Key ResponsibilitiesIf you’re passionate about developing robust DFT solutions for advanced semiconductor products, we’d love to hear from you.
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It services
51 - 200 Employees
Hoffman Estates, IL, US
2017