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Ai Chip Design Rtl Jobs in Michigan (NOW HIRING)

Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is ... AI algorithms that power the innovative capabilities that KLA is recognized for. By joining our ...

Senior SoC Architect

Ann Arbor, MI · On-site

$180 - $240/hr

... chip AI inference. We've co-designed a full hardware-software stack (compiler, runtime, and APIs ... Powered by MemryX Compute Engines, our decentralized many-core dataflow design delivers industry ...

Familiarity with ESD, EMI, and RF design considerations * Ability to use Verilog, RTL, or HLS an asset * Embraces AI as part of a modern engineering toolkit Location and travel : Fully remote role ...

Hardware Designer

Detroit, MI · On-site

$110 - $160/hr

Familiarity with ESD, EMI, and RF design considerations * Ability to use Verilog, RTL, or HLS an asset * Embraces AI as part of a modern engineering toolkit Location and travel Fully remote role and ...

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Ai Chip Design Rtl information

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What job categories do people searching Ai Chip Design Rtl jobs in Michigan look for?

The top searched job categories for Ai Chip Design Rtl jobs in Michigan are:

What cities in Michigan are hiring for Ai Chip Design Rtl jobs?

Cities in Michigan with the most Ai Chip Design Rtl job openings:

Application Engineer, Data Center Hardware/Firmware

Utilidata, Inc.

Ann Arbor, MI • On-site

$160 - $195/hr

Other

Medical, Dental, Vision, Retirement, PTO

Posted 18 days ago


Job description

Utilidata is a fast-growing NVIDIA-backed AI company enabling AI data centers to dynamically orchestrate power and unlock more compute capacity from existing energy infrastructure. For over a decade, we have applied AI to the electric grid — bringing real-time visibility and power‑flow control to complex energy infrastructure. Our Karman platform, built on a custom NVIDIA module, brings that same capability to AI data centers, giving operators a way to better use the power already available to them.

Responsibilities
  • Partner with Product and GTM teams pre‑contract to assess customer hardware environments and build proof‑of‑concept integration layers that demonstrate Karman's value
  • Design and implement the hardware integration layer between Karman and customer infrastructure; review both Utilidata and customer hardware designs to identify integration points and gaps
  • Write and modify embedded firmware to adapt Karman to each customer's platform
  • Own end‑to‑end technical execution for customer hardware integrations, from kick‑off through design, validation, release, and deployment
  • Lead customer‑facing technical calls, on‑site visits, and requirements reviews with customer engineering, IT, and operations teams
  • Create and maintain customer integration artifacts, including HW Design Review Checklists, Validation and Test Checklists, Installation and Power‑Up Guides, HW Release Timelines, KPI trackers, and After‑Action Reports
  • Develop HW Design Collaterals covering layout, schematic, power, IO, signal integrity, thermal, and RFI requirements
  • Produce SOM and metrology bring‑up documentation, including HW Bring‑Up and Power‑Up Guides and design reviews for schematics, layouts, and test results
  • Track hardware KPIs and risks; elevate and coordinate resolution across engineering teams
  • Take an AI‑first approach to automating processes and generating integration and deployment artifacts
  • Participate in roadmap meetings, sprint planning, and design reviews with the HW team to maintain current product knowledge
  • Serve as the feedback loop between field deployments and core engineering, translating integration learnings into product improvements
  • Build out repeatable processes, templates, and best practices to scale the Application Engineering function
Minimum Qualifications
  • 8+ years of hands‑on hardware and embedded firmware engineering experience, with a demonstrated ability to independently design, implement, and validate hardware solutions from concept through production
  • Bachelor's degree in Electrical Engineering, computer science or similar field OR equivalent training and on‑the‑job experience
  • Proven experience designing hardware integration points, including PCB‑level design, interface definition, and system bring‑up, owned end‑to‑end
  • FPGA development experience spanning both hardware design/RTL and firmware
  • Proficiency writing, modifying, and debugging embedded firmware independently
  • Working knowledge of embedded and data center interfaces and protocols (e.g., I2C, UART, PCIe, Ethernet)
  • Ability to read and critically review schematics, PCB layouts, and test results
  • Demonstrated ability to produce structured engineering artifacts, including design review checklists, test plans, validation procedures, and deployment documentation
  • Strong communication skills with the ability to present technical content to both engineering and non‑engineering audiences
  • High learning agility in fast‑moving, early‑stage product environments
  • Experience in data center infrastructure, power electronics, or energy management hardware
  • Willingness to travel for customer kick‑offs, on‑site reviews, and deployment validation
Enhanced Qualifications (Nice to Have)
  • Master’s degree in Electrical Engineer or related field
  • Familiarity with System‑on‑Module (SOM) platforms or metrology hardware
  • Knowledge of power quality, thermal management, or power sequencing
  • Experience with embedded Linux, BSP bring‑up, or Yocto‑based OS customization
  • Familiarity with on‑device messaging and serialization patterns (e.g., ZeroMQ, Protobuf, gRPC, REST APIs)
  • Prior experience in a customer‑facing technical role such as Field Application Engineer or systems integration engineer
Salary Range

$160,000 to $195,000 base compensation depending on experience plus stock options. Salary will be commensurate with an individual's skills, training, years of experience, and in line with internal compensation bands.

Location

This position is based onsite at our company headquarters in Ann Arbor, Michigan, with flexibility for occasional remote work.

EEO Statement

Utilidata values the diversity of our team. We provide equal employment opportunities without regard to race, color, religion, creed, sex, gender, sexual orientation, gender identity or expression, national origin, age, physical disability, mental disability, medical condition, pregnancy or childbirth, sexual orientation, genetics, genetic information, marital status, or status as a covered veteran or any other basis protected by applicable federal, state and local laws.

Benefits
  • Empowering employees to solve problems and work together to make a difference
  • Providing mentorship and growth opportunities as part of a collaborative team
  • A flexible work environment with flexible paid time off
  • Competitive compensation and benefits, including health, dental, vision, and employer‑match 401k
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