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Ai Chip Design Rtl Jobs in Michigan (NOW HIRING)

Stellantis

Senior Automotive Hardware Architect

Detroit, MI · On-site

$97K - $124K/yr

This role involves working closely with vehicle Architecture/system Design, safety engineer & Buyer ... Experience in RISC-V architecture, AI/ML, hypervisor technologies is a plus * Experience in ...

Stellantis

Senior Automotive Hardware Architect

Detroit, MI · On-site

$97K - $124K/yr

This role involves working closely with vehicle Architecture/system Design, safety engineer & Buyer ... Experience in RISC-V architecture, AI/ML, hypervisor technologies is a plus * Experience in ...

SpotOn

Product Manager (Payments)

Royal Oak, MI · On-site

$180K - $225K/yr

From our award-winning point-of-sale to AI-powered profit tools, everything we do helps operators ... Define how each payment media type is presented and accepted --chip, contactless, digital wallets, ...

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Ai Chip Design Rtl information

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

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Ai Chip Design Rtl jobs near you

Senior Automotive Hardware Architect

Stellantis

Detroit, MI • On-site

$97K - $124K/yr

Full-time

Re-posted yesterday

Stellantis rating

7.5

Company rating: 7.5 out of 10

Based on 131 frontline employees who took The Breakroom Quiz

13th of 45 rated automakers

Job description

The main job responsibilities will include but not limited to:
  • Responsible to drive the HW architecture and semiconductor component selection/decision for the next generation IVI (In-vehicle infotainment system), Telematics, ADAS, HPC platforms.
  • Specialized in selecting and recommending next generation semiconductor solution for automotive IVI/ADAS/HPC system, electronics/ECU designing and developing the electronic components and systems that power car IVI/ADAS/HPC systems, ensuring high-quality and seamless integration with vehicle technology.
  • This role involves working closely with vehicle Architecture/system Design, safety engineer & Buyer/purchasing ensuring that the chosen components meet the performance, reliability, and cost requirements of the applications.
  • Technical expertise in recommending and proposing the right electronic components not limited to Display technology, Cluster technology, Audio amplifiers, MCU/MPU, SIP/SOC, Memories (UFS, LPDDR, Flash), Microphone interface/Audio ADC, Audio DSP, Audio power circuitry/PMIC, Speaker interface, Digital audio interfaces (A2B, Ethernet, etc.), working knowledge on ANC (Active noise cancellation) and RNC (Road noise cancellation) design.
  • Familiarity with relevant automotive safety and quality standards, such as ISO 26262 and AEC-Q100.
  • Experience with acoustic measurement instruments, Familiar with audio data acquisition, analysis systems and Audio Precision.
  • Work proactively with silicon vendor partners to drive design features and technology road map.
  • Support HW Engineering group during advanced design phases, system architecture definitions and ECU development / Qualifications.
  • Drive the HW architecture decision for the next Stellantis automotive computing system/hardware architecture, taking consideration of key KPIs that deliver scalable, reusable and cost optimized platforms.
  • Provide technical expertise in MCU/MPU/SoC Internal Architecture to maximize the ECU Hardware design efficiency/performance in the areas of Body, Propulsion, Chassis, Gateway, Zone, ADAS and Infotainment
  • Provide technical expertise for ARM, RISC-V, HW accelerations, Neural network processing, Video decode/encode, Image processing, Audio processing, Camera & Display, Networking, and advanced memory technologies.
  • Provide technical expertise for the best-in-class ISO26262 and Cyber security implementation.
  • Support discussions between the HW Engineering and the Semiconductor groups for High level MCU/MPU/SoC specifications for IVI/ADAS/HPC systems.
  • Support MCU/MPU/SoC/IVI technology roadmap definitions by regularly providing survey study of relevant industry technologies and chip solutions.Collaborate in a Scaled Agile product delivery team, comprised of cross-functional company peers to continuously prioritize, refine, and deploy component.
  • Understand Stellantis Domain team requirements, project milestones, technology relevance.

Basic Qualifications:
  • Bachelors Degree in Electrical/Electronics, Telecommunication, or equivalent Engineering discipline
  • Minimum 10 years of experience in automotive embedded electronics designs or hardware/system architecture role
  • Knowledge/Experience of IVI, Audio system, Automotive vehicle connectivity systems, ADAS/HPC and ECU design, development, and testing.
  • Justified experience in ARM 32/64bits architecture, power management, high speed interfaces, memories, data networking (ETH, CANxx, LIN...)
  • Strong teamwork spirit; excellent oral and written communication skills; ability to work independently in a global team environment.

Preferred Qualifications:
  • Experience in industrial or automotive (preferred) area (TIER1, TIER2)
  • Experience in RISC-V architecture, AI/ML, hypervisor technologies is a plus
  • Experience in software engineering and software architecture development
  • Knowledge of safety standards including ISO 26262, Euro NAP, and Security regulations
  • Solid understanding of embedded electronics design constraints at the component and system level
  • Understanding and knowledge of Board software/Bring up software, Audio DSP and MCUs.

Critical Character Traits to Ensure Success:
  • Be curious
  • Ability to think outside-the-box in high pressure situations
  • Ability to multi-task
  • Detail oriented problem-solver
  • Self-starter with the ability to work independently given minimal supervision
  • Ability to work in a team environment and be both a team player and task leader
  • Respect and understanding of the Customer/Supplier relationship while embracing partnership
  • Ability to present concepts/strategies/project status to large groups

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