As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art layouts for mixed-signal and analog circuits * Amplifiers * Filters * Switched capacitor circuits
As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art layouts for mixed-signal and analog circuits * Amplifiers * Filters * Switched capacitor circuits
Lead Analog IC Layout Engineer
Wilmington, MA · On-site
$134K - $201K/yr
Lead Analog IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization within Instrumentation delivers high-performance solutions that enable production testing of ...
Lead Analog IC Layout Engineer
Wilmington, MA · On-site
$134K - $201K/yr
Lead Analog IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization within Instrumentation delivers high-performance solutions that enable production testing of ...
Analog IC Layout Engineer
Fremont, CA · On-site
$83K - $139K/yr
As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art layouts for mixed-signal and analog circuits * Amplifiers * Filters * Switched capacitor circuits
Analog IC Layout Engineer
Fremont, CA · On-site
$83K - $139K/yr
As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art layouts for mixed-signal and analog circuits * Amplifiers * Filters * Switched capacitor circuits
Lead Analog IC Layout Engineer
$134K - $201K/yr
Lead Analog IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization within Instrumentation delivers highperformance solutions that enable production testing of ...
Lead Analog IC Layout Engineer
$134K - $201K/yr
Lead Analog IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization within Instrumentation delivers highperformance solutions that enable production testing of ...
The Role As a Mixed-Signal and Analog IC Layout Manager, you will take ownership of chip-level layout execution and verification for high-performance, full-custom ICs. This is a hands-on leadership ...
The Role As a Mixed-Signal and Analog IC Layout Manager, you will take ownership of chip-level layout execution and verification for high-performance, full-custom ICs. This is a hands-on leadership ...
Analog IC Design Engineer
$104K - $137K/yr
Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues * Familiarity with VerilogA/AMS behavioral modeling is a plus
Analog IC Design Engineer
$104K - $137K/yr
Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues * Familiarity with VerilogA/AMS behavioral modeling is a plus
RF/Analog IC Layout Engineer Job Location: SF Bay Area, San Diego, Austin Job Duration: 3 months, Contract to Hire Job Summary: * You will work along our layout engineers and RF designers to build ...
Quick apply
RF/Analog IC Layout Engineer Job Location: SF Bay Area, San Diego, Austin Job Duration: 3 months, Contract to Hire Job Summary: * You will work along our layout engineers and RF designers to build ...
Analog IC Design Engineer
$104K - $137K/yr
Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues * Familiarity with VerilogA/AMS behavioral modeling is a plus
Analog IC Design Engineer
$104K - $137K/yr
Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues * Familiarity with VerilogA/AMS behavioral modeling is a plus
Analog IC Design Engineer
Princeton, NJ · On-site
$104K - $137K/yr
Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues * Familiarity with VerilogA/AMS behavioral modeling is a plus
Analog IC Design Engineer
Princeton, NJ · On-site
$104K - $137K/yr
Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues * Familiarity with VerilogA/AMS behavioral modeling is a plus
Senior Analog IC Layout Engineer
San Diego, CA · On-site
$96K - $144K/yr
Minimum of 5 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Senior Analog IC Layout Engineer
San Diego, CA · On-site
$96K - $144K/yr
Minimum of 5 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Staff Analog IC Layout Engineer
San Diego, CA · On-site
$120K - $180K/yr
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Quick apply
Staff Analog IC Layout Engineer
San Diego, CA · On-site
$120K - $180K/yr
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Staff Analog IC Layout Engineer
$120K - $180K/yr
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Staff Analog IC Layout Engineer
$120K - $180K/yr
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Senior Analog IC Layout Engineer
San Diego, CA · On-site
$96K - $144K/yr
Minimum of 5 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Senior Analog IC Layout Engineer
San Diego, CA · On-site
$96K - $144K/yr
Minimum of 5 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Staff Analog IC Layout Engineer
San Diego, CA · On-site
$120K - $180K/yr
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Staff Analog IC Layout Engineer
San Diego, CA · On-site
$120K - $180K/yr
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Senior Analog IC Layout Engineer
San Diego, CA · On-site
$96K - $144K/yr
Minimum of 5 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Quick apply
Senior Analog IC Layout Engineer
San Diego, CA · On-site
$96K - $144K/yr
Minimum of 5 years of professional experience in analog and mixed-signal IC layout design * Strong knowledge of analog CMOS circuits and device physics fundamentals * Solid understanding of the IC ...
Analog IC Design Engineer
Cupertino, CA · On-site
Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... as it applies to analog IC designsProven working experience in using spectrum analyzers ...
Analog IC Design Engineer
Cupertino, CA · On-site
Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... as it applies to analog IC designsProven working experience in using spectrum analyzers ...
Analog IC Design Engineer
Cupertino, CA · On-site
Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... as it applies to analog IC designsProven working experience in using spectrum analyzers ...
Analog IC Design Engineer
Cupertino, CA · On-site
Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... as it applies to analog IC designsProven working experience in using spectrum analyzers ...
Principal IC Layout Engineer
Wilmington, MA · On-site
$159K - $239K/yr
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that ... Principal IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization ...
Principal IC Layout Engineer
Wilmington, MA · On-site
$159K - $239K/yr
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that ... Principal IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization ...
Sr. Analog Physical Design Engineer
$156K - $160K/yr
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using industry-standard tools like Cadence Virtuoso and Calibre. * Execute top-level layout and coordinate ...
Sr. Analog Physical Design Engineer
$156K - $160K/yr
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using industry-standard tools like Cadence Virtuoso and Calibre. * Execute top-level layout and coordinate ...
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using industry-standard tools like Cadence Virtuoso and Calibre. * Execute top-level layout and coordinate ...
Quick apply
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using industry-standard tools like Cadence Virtuoso and Calibre. * Execute top-level layout and coordinate ...
Analog Ic Layout information
See salary details
$100.5K - $111.8K
14% of jobs
$117.2K is the 25th percentile. Wages below this are outliers.
$111.8K - $123.1K
24% of jobs
The median wage is $130.3K / yr.
$123.1K - $134.5K
20% of jobs
$141.9K is the 75th percentile. Wages above this are outliers.
$134.5K - $145.8K
27% of jobs
$145.8K - $157.1K
0% of jobs
$157.1K - $168.4K
0% of jobs
$168.4K - $179.7K
0% of jobs
$179.7K - $191K
4% of jobs
$191K - $202.4K
4% of jobs
$202.4K - $213.7K
3% of jobs
$213.7K - $225K
4% of jobs
$100.5K
$142.4K
$225K
How much do analog ic layout jobs pay per year?
What is the difference between Analog Ic Layout vs Digital IC Layout?
| Aspect | Analog IC Layout | Digital IC Layout |
|---|---|---|
| Design Focus | Continuous signal processing, precision | Binary signal processing, logic |
| Complexity | High, due to analog component interactions | Moderate to high, depending on logic complexity |
| Tools & Techniques | Specialized analog layout tools, parasitic extraction | Standard digital EDA tools, place & route |
| Work Environment | Cleanroom, high precision | Cleanroom, logic optimization |
Analog IC Layout involves designing circuits that handle continuous signals with high precision, requiring specialized tools and techniques. Digital IC Layout focuses on binary logic circuits, often with more standardized processes. Both roles demand a strong understanding of semiconductor fabrication and layout design, but they differ in complexity and focus areas.
What are some typical challenges faced by Analog IC Layout engineers when working on complex projects?
What are the key skills and qualifications needed to thrive as an Analog IC Layout Engineer, and why are they important?
What is analog IC layout?

Job description
Team Description:
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Description and Responsibilities:
We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer, your responsibilities will include:
- Crafting state-of-the-art layouts for mixed-signal and analog circuits
- Amplifiers
- Filters
- Switched capacitor circuits
- Oscillators
- Data converters
- Power management circuits
- Reviewing layout floorplans and analyzing high-fidelity circuits with circuit engineers
- Physical verification of custom IC mask layouts (LVS, DRC, ERC)
Required Qualifications:
- 2+ years of experience in analog and mixed-signal IC layout design
- 1+ year experience with FinFET technologies
- Ability to identify the best approach to solving problems
Preferred Qualifications:
- Programming/scripting knowledge in SKILL, TCL, Shell, C/C++, and/or Python
- Proven expertise in implementing analog and mixed-signal layout designs, achieving tight matching, low noise, and low power consumption
- Understanding on failure-prone circuit and layout structures
- Experience with analog DFM standards
- Experience with layout P-cell design and implementation
- Experience with layout automationÂ
About NEURALINK
Sourced by ZipRecruiter
Industry
Biotechnology research and development
Company size
201 - 500 Employees
Headquarters location
San Francisco, CA, US
Year founded
2016