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Analog Ic Layout Jobs (NOW HIRING)

Apple

Analog IC Design Engineer

Cupertino, CA

$171K - $302K/yr

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Apple

Analog IC Design Engineer

Cupertino, CA

$126K - $220K/yr

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Apple

Analog IC Design Engineer

Cupertino, CA

$181K - $318K/yr

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Apple

Analog IC Design Engineer

Cupertino, CA

$171K - $302K/yr

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Apple

Analog IC Design Engineer

Cupertino, CA

$126K - $220K/yr

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Apple

Analog IC Design Engineer

Cupertino, CA

$181K - $318K/yr

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Apple

Analog IC Design Engineer

Cupertino, CA · On-site

$181K - $318K/yr

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Apple

Analog IC Design Engineer

Cupertino, CA

$126K - $220K/yr

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Analogdevices

Principal IC Layout Engineer

Wilmington, MA · On-site

$159K - $239K/yr

About Analog Devices Analog Devices, Inc. (NASDAQ:ADI) is a global semiconductor leader that ... Principal IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization ...

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Analog Ic Layout information

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$100.5K

$142.4K

$225K

How much do analog ic layout jobs pay per year?

As of Jun 14, 2026, the average yearly pay for analog ic layout in the United States is $142,396.00, according to ZipRecruiter salary data. Most workers in this role earn between $117,500.00 and $139,000.00 per year, depending on experience, location, and employer.

What is the difference between Analog Ic Layout vs Digital IC Layout?

AspectAnalog IC LayoutDigital IC Layout
Design FocusContinuous signal processing, precisionBinary signal processing, logic
ComplexityHigh, due to analog component interactionsModerate to high, depending on logic complexity
Tools & TechniquesSpecialized analog layout tools, parasitic extractionStandard digital EDA tools, place & route
Work EnvironmentCleanroom, high precisionCleanroom, logic optimization

Analog IC Layout involves designing circuits that handle continuous signals with high precision, requiring specialized tools and techniques. Digital IC Layout focuses on binary logic circuits, often with more standardized processes. Both roles demand a strong understanding of semiconductor fabrication and layout design, but they differ in complexity and focus areas.

What are some typical challenges faced by Analog IC Layout engineers when working on complex projects?

Analog IC Layout engineers often encounter challenges related to managing parasitic effects, tight space constraints, and meeting stringent performance specifications. Coordinating closely with circuit designers to ensure optimal placement and routing while minimizing noise and interference is essential. Additionally, adhering to foundry design rules and ensuring first-pass silicon success can be demanding, requiring attention to detail and effective communication within cross-functional teams. Staying updated with evolving process technologies and EDA tools also plays a crucial role in overcoming these challenges.

What are the key skills and qualifications needed to thrive as an Analog IC Layout Engineer, and why are they important?

To thrive as an Analog IC Layout Engineer, you need a solid background in electronics, semiconductor physics, and integrated circuit design, typically supported by a degree in electrical engineering or a related field. Familiarity with EDA tools like Cadence Virtuoso, DRC/LVS verification systems, and knowledge of layout design rules are essential. Attention to detail, problem-solving abilities, and strong communication skills help you collaborate effectively with design teams and address complex layout challenges. These skills ensure reliable, high-performance chip designs that meet strict industry standards and project requirements.

What is analog IC layout?

Analog IC layout is the process of physically designing the circuitry for analog integrated circuits on a semiconductor chip. It involves translating circuit schematics into geometric shapes and patterns that define the placement of transistors, resistors, capacitors, and interconnections. The goal is to optimize performance, minimize noise, and ensure manufacturability while meeting design specifications for analog functions such as amplification, filtering, and signal processing.
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Analog Ic Layout jobs near you
Infographic showing various Analog Ic Layout job openings in the United States as of June 2026, with employment types broken down into 1% As Needed, 88% Full Time, 4% Part Time, 6% Contract, and 1% Nights. Highlights an 94% Physical, 2% Hybrid, and 4% Remote job distribution, with an average salary of $142,396 per year, or $68.5 per hour.
Lead Analog IC Designer

Lead Analog IC Designer

Cadence Design Systems Inc.

San Jose, CA

$114K - $213K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 11 days ago

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job description:

The lead Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.

  • Candidate's background should include a minimum of 3 years of experience in CMOS SerDes or high-speed I/O IC design and development
  • Working knowledge of a set of common SerDes standards and their electrical requirements is a plus
  • Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators
  • Excellent problem solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment
  • Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification
  • Cadence tool experience, lab test experience, and design experience at >112Gbps and in <7nm technologies are a plus
  • MS or PhD in EE

The annual salary range for California is $114,800 to $213,200. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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