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Analog Ic Layout Jobs (NOW HIRING)

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

IC Layout Engineer III

Princeton, NJ · On-site

$92K - $122K/yr

Evaluating layout requirements for designs targeting different technologies (analog or digital ... relevant IC layout work experience. * Fundamental knowledge of Integrated Circuit CAD design.

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

IC Layout Engineer III

Princeton, NJ · On-site

$92K - $122K/yr

Evaluating layout requirements for designs targeting different technologies (analog or digital ... relevant IC layout work experience. * Fundamental knowledge of Integrated Circuit CAD design.

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

Showing results 41-60

Analog Ic Layout information

See salary details

$100.5K

$142.4K

$225K

How much do analog ic layout jobs pay per year?

As of Aug 17, 2026, the average yearly pay for analog ic layout in the United States is $142,396.00, according to ZipRecruiter salary data. Most workers in this role earn between $117,500.00 and $139,000.00 per year, depending on experience, location, and employer.

What is analog IC layout?

Analog IC layout is the process of physically designing the circuitry for analog integrated circuits on a semiconductor chip. It involves translating circuit schematics into geometric shapes and patterns that define the placement of transistors, resistors, capacitors, and interconnections. The goal is to optimize performance, minimize noise, and ensure manufacturability while meeting design specifications for analog functions such as amplification, filtering, and signal processing.

What are the key skills and qualifications needed to thrive as an analog IC layout engineer?

To thrive as an Analog IC Layout Engineer, you need a solid background in electronics, semiconductor physics, and integrated circuit design, typically supported by a degree in electrical engineering or a related field. Familiarity with EDA tools like Cadence Virtuoso, DRC/LVS verification systems, and knowledge of layout design rules are essential. Attention to detail, problem-solving abilities, and strong communication skills help you collaborate effectively with design teams and address complex layout challenges. These skills ensure reliable, high-performance chip designs that meet strict industry standards and project requirements.

What are some typical challenges faced by analog IC layout engineers when working on complex projects?

Analog IC Layout engineers often encounter challenges related to managing parasitic effects, tight space constraints, and meeting stringent performance specifications. Coordinating closely with circuit designers to ensure optimal placement and routing while minimizing noise and interference is essential. Additionally, adhering to foundry design rules and ensuring first-pass silicon success can be demanding, requiring attention to detail and effective communication within cross-functional teams. Staying updated with evolving process technologies and EDA tools also plays a crucial role in overcoming these challenges.

What is the difference between Analog Ic Layout vs Digital IC Layout?

AspectAnalog IC LayoutDigital IC Layout
Design FocusContinuous signal processing, precisionBinary signal processing, logic
ComplexityHigh, due to analog component interactionsModerate to high, depending on logic complexity
Tools & TechniquesSpecialized analog layout tools, parasitic extractionStandard digital EDA tools, place & route
Work EnvironmentCleanroom, high precisionCleanroom, logic optimization

Analog IC Layout involves designing circuits that handle continuous signals with high precision, requiring specialized tools and techniques. Digital IC Layout focuses on binary logic circuits, often with more standardized processes. Both roles demand a strong understanding of semiconductor fabrication and layout design, but they differ in complexity and focus areas.

More about Analog Ic Layout jobs
Infographic showing various Analog Ic Layout job openings in the United States as of August 2026, with employment types broken down into 81% Full Time, 14% Part Time, 2% Contract, and 3% Nights. Highlights an 94% Physical, 2% Hybrid, and 4% Remote job distribution, with an average salary of $142,396 per year, or $68.5 per hour.

$92K - $122K/yr

Full-time

Posted 7 days ago


Job description

Overview

SRI International (formerly Sarnoff Corporation) is looking for a capable IC Layout Engineer in our Princeton, NJ office. The successful candidate will be presented with challenges in IC Layout and will be working closely with the SRI Princeton foundry and Design team in the development of form, fit and function emulation (not duplication) of obsolete microcircuits for the U.S. Government.  Target microcircuits are emulated with pre-established gate arrays with only metallization determining the actual circuit function.  The emulated design must meet all specifications and characteristics of the original microcircuit. 

Responsibilities
  • Layout of IC designs for existing technologies (CMOS, BiCMOS, Bipolar etc)
  • Generating and/or supervising the creation of IC layout rules (LVS,DRC,ERC) for technologies in development
  • Evaluating layout requirements for designs targeting different technologies (analog or digital)
  • Documenting critical technology information to be used by Layout team
  • Evaluating and enhancing Place & Route algorithms and processes for complex digital designs
  • Contributing to layout tool suites by supporting and/or developing CAD scripts (Memory cell placement, antenna effect mitigation, etc)
Qualifications
  • BS in electrical engineering or related engineering degree, OR 4 years equivalent experience gained through work projects related to design and drafting without a degree.
  • 5 + years of relevant IC layout work experience. 
  • Fundamental knowledge of Integrated Circuit CAD design.
  • Demonstrated analytical and systematic teamwork approach to troubleshooting.
  • Demonstrated ability to effectively communicate with team members (verbal and written).
  • Due to Government requirements candidates must be a US Citizen or Permanent Resident.

The salary range is: $92,160-$122,112. Salary ranges will vary and are based on several factors, including geographic location, market competitiveness and equity amongst internal employees in similar roles. Positions may also qualify for SRI's Pay for Outstanding Performance program or the annual Performance Based Compensation program. SRI also has a competitive benefits package, to view details please go to https://www.sri.com/resources/benefits/. SRI will accept applications until the position is filled.

SRI is an independent nonprofit research institute headquartered in Menlo Park, Calif., with a rich history of supporting government and industry. We create and deliver world-changing solutions for a safer, healthier, and more sustainable future. For almost 80 years, we have collaborated across technical and scientific disciplines to discover and develop groundbreaking products and technologies and bring innovations and ideas to the marketplace.

Employment Type: FULL_TIME