Santa Clara, CA · On-site
$237K/yr
Analog Layout Design Engineer Job Location: Santa Clara, CA (Onsite for 5 days a week) Job Type: Long-term contract Duration: 12 months Minimum Qualifications * The ideal candidate should have a ...
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Santa Clara, CA · On-site
$237K/yr
Analog Layout Design Engineer Job Location: Santa Clara, CA (Onsite for 5 days a week) Job Type: Long-term contract Duration: 12 months Minimum Qualifications * The ideal candidate should have a ...
Austin, TX · On-site
$200K/yr
The Role and Impact Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive ...
Austin, TX · On-site
$200K/yr
The Role and Impact Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive ...
Hillsboro, OR · On-site
$220K/yr
The Role and Impact Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive ...
Hillsboro, OR · On-site
$220K/yr
The Role and Impact Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive ...
Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 Months, Contract to Hire * Experience with layout of cutting-edge high-performance, high-speed CMOS integrated ...
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Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 Months, Contract to Hire * Experience with layout of cutting-edge high-performance, high-speed CMOS integrated ...
Irvine, CA · On-site +1
$217K/yr
Senior to Principal High-Speed Analog Layout Design Engineer roles Locations : Irvine, CA or San Jose, CA or remote About the Role Celero Communication Inc. is an exciting and fast-growing start-up ...
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Irvine, CA · On-site +1
$217K/yr
Senior to Principal High-Speed Analog Layout Design Engineer roles Locations : Irvine, CA or San Jose, CA or remote About the Role Celero Communication Inc. is an exciting and fast-growing start-up ...
San Jose, CA · On-site +1
$239K/yr
Senior to Principal High-Speed Analog Layout Design Engineer roles Locations : Irvine, CA or San Jose, CA or remote About the Role Celero Communication Inc. is an exciting and fast-growing start-up ...
Quick apply
San Jose, CA · On-site +1
$239K/yr
Senior to Principal High-Speed Analog Layout Design Engineer roles Locations : Irvine, CA or San Jose, CA or remote About the Role Celero Communication Inc. is an exciting and fast-growing start-up ...
San Jose, CA · On-site
$150K - $250K/yr
We are seeking a Principal/Senior Analog Layout Engineer to drive the layout design of complex analog and mixed-signal IP blocks that are at the heart of our advanced optical communication systems.
San Jose, CA · On-site
$150K - $250K/yr
We are seeking a Principal/Senior Analog Layout Engineer to drive the layout design of complex analog and mixed-signal IP blocks that are at the heart of our advanced optical communication systems.
San Francisco, CA · On-site
$238K/yr
Analog Layout Design engineer Location : bay area, CA - onsite Responsibilities: * Minimum 15+ years of related experience with an associate degree. * Own and Execute the layout design of analog ...
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San Francisco, CA · On-site
$238K/yr
Analog Layout Design engineer Location : bay area, CA - onsite Responsibilities: * Minimum 15+ years of related experience with an associate degree. * Own and Execute the layout design of analog ...
$110K - $300K/yr
This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals. Responsibilities: * Lead a team of layout engineers ...
$110K - $300K/yr
This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals. Responsibilities: * Lead a team of layout engineers ...
Santa Clara, CA · On-site
$110K - $140K/yr
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$110K - $140K/yr
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
San Jose, CA · On-site
$110K - $300K/yr
This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals. Responsibilities: * Lead a team of layout engineers ...
San Jose, CA · On-site
$110K - $300K/yr
This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals. Responsibilities: * Lead a team of layout engineers ...
$110K - $150K/yr
We are looking forImage Sensor Analog Design Engineer for design and development of next generation ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $150K/yr
We are looking forImage Sensor Analog Design Engineer for design and development of next generation ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$110K - $140K/yr
Description We are looking for qualified Analog design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$110K - $140K/yr
Description We are looking for qualified Analog design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Quick apply
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $150K/yr
We are looking for Image Sensor Analog Design Engineer for design and development of next ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $150K/yr
We are looking for Image Sensor Analog Design Engineer for design and development of next ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$130K - $150K/yr
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$130K - $150K/yr
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$110K - $140K/yr
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$110K - $140K/yr
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Austin, TX · On-site
$200K/yr
As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...
Austin, TX · On-site
$200K/yr
As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...
Santa Clara, CA · On-site
$130K - $150K/yr
Description We are looking for qualified Analog circuit design engineers who have a good ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$130K - $150K/yr
Description We are looking for qualified Analog circuit design engineers who have a good ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Quick apply
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$77K - $88.5K
2% of jobs
$88.5K - $99.9K
1% of jobs
$99.9K - $111.4K
2% of jobs
$111.4K - $122.8K
2% of jobs
$122.8K - $134.3K
5% of jobs
$134.3K - $145.7K
3% of jobs
$145.7K - $157.2K
2% of jobs
$157.2K - $168.6K
2% of jobs
$168.6K - $180.1K
2% of jobs
$180.1K - $191.5K
2% of jobs
$191.7K is the 25th percentile. Wages below this are outliers.
$191.5K - $203K
76% of jobs
$77K
$186.2K
$203K
Analog Layout Design Engineers often encounter challenges such as optimizing layout for performance while adhering to stringent area, power, and manufacturing constraints. They need to carefully manage parasitic effects, signal interference, and design rule compliance to maintain the integrity of highly sensitive analog circuits. Close collaboration with circuit designers, verification engineers, and fabrication teams is essential to resolve design issues and achieve successful tape-out. Working under tight project deadlines and high quality standards is common, so effective time management and adaptability are important skills in this role.
An Analog Layout Design Engineer is responsible for designing the physical layout of analog and mixed-signal integrated circuits (ICs). They work closely with circuit designers to translate schematics into detailed layouts, ensuring optimal performance, manufacturability, and reliability. Their role involves tasks such as floorplanning, placement, routing, parasitic extraction, and design rule verification. They use industry-standard CAD tools to create layouts that meet strict design specifications and foundry requirements. This position requires strong knowledge of semiconductor processes, EDA tools, and design optimization techniques.
To thrive as an Analog Layout Design Engineer, you need a strong background in electrical engineering, expertise in integrated circuit (IC) layout, and familiarity with design principles and semiconductor processes. Proficiency with electronic design automation (EDA) tools such as Cadence Virtuoso or Mentor Graphics, and a basic understanding of verification tools and foundry design rules, are highly valued. Attention to detail, effective communication, and strong problem-solving abilities are essential soft skills for success in this role. These qualifications ensure precise, high-quality designs that meet stringent performance and manufacturability requirements.
$237K/yr
Contractor
Re-posted 11 days ago
Job Title: Analog Layout Design Engineer
Job Location: Santa Clara, CA (Onsite for 5 days a week)
Job Type: Long-term contract
Duration: 12 months
Minimum Qualifications
Sourced by ZipRecruiter
It services
201 - 500 Employees
Los Alamitos, CA, US
2016
