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Intern Analog Layout Design Engineer Jobs (NOW HIRING)

The Role and Impact Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive ...

The Role and Impact Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive ...

Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 Months, Contract to Hire * Experience with layout of cutting-edge high-performance, high-speed CMOS integrated ...

Analog Layout Engineer

San Jose, CA ยท On-site

$110K - $300K/yr

This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals. Responsibilities: * Lead a team of layout engineers ...

Analog Design Engineer

Irvine, CA ยท On-site

$110K - $150K/yr

We are looking forImage Sensor Analog Design Engineer for design and development of next generation ... Perform the block level and transistor level layout design and optimization of sensor array readout ...

Analog Design Engineer

Santa Clara, CA ยท On-site

$110K - $140K/yr

Description We are looking for qualified Analog design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...

We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...

We are looking for Image Sensor Analog Design Engineer for design and development of next ... Perform the block level and transistor level layout design and optimization of sensor array readout ...

We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...

We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...

Analog Layout Engineer

Austin, TX ยท On-site

$200K/yr

As an Analog Layout engineer, you'll play a crucial role in translating design concepts into silicon, collaborating closely with circuit designers, and leveraging advanced tools. Your work will ...

Sr. Analog Design Engineer

Santa Clara, CA ยท On-site

$130K - $150K/yr

Description We are looking for qualified Analog circuit design engineers who have a good ... Perform the block level and transistor level layout design and optimization of sensor array readout ...

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Intern Analog Layout Design Engineer information

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$77K

$186.2K

$203K

How much do intern analog layout design engineer jobs pay per year?

As of Aug 9, 2026, the average yearly pay for intern analog layout design engineer in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

What is the difference between Intern Analog Layout Design Engineer vs Intern Digital Layout Design Engineer?

AspectIntern Analog Layout Design EngineerIntern Digital Layout Design Engineer
Required SkillsAnalog circuit fundamentals, layout design, SPICE simulationDigital circuit fundamentals, RTL design, layout automation tools
Work EnvironmentDesign teams focused on analog/mixed-signal ICsDesign teams focused on digital ICs and FPGA/ASIC design
Industry UsageSemiconductor companies, chip design firmsSemiconductor companies, FPGA/ASIC vendors

Intern Analog Layout Design Engineers focus on analog/mixed-signal IC layout, requiring knowledge of analog circuits and layout tools. Intern Digital Layout Design Engineers work on digital ICs, emphasizing digital design principles and automation. Both roles are common in semiconductor industries but differ in technical focus and tools used.

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What cities are hiring for Intern Analog Layout Design Engineer jobs? Cities with the most Intern Analog Layout Design Engineer job openings:
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Infographic showing various Intern Analog Layout Design Engineer job openings in the United States as of August 2026, with employment types broken down into 88% Full Time, 7% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $186,238 per year, or $89.5 per hour.

Analog Layout Design Engineer

Quantum World Technologies Inc

Santa Clara, CA โ€ข On-site

$237K/yr

Contractor

Re-posted 12 days ago


Job description

Job Title: Analog Layout Design Engineer

Job Location: Santa Clara, CA (Onsite for 5 days a week)

Job Type: Long-term contract

Duration: 12 months

Minimum Qualifications

  • The ideal candidate should have a minimum of BS/MS in Electrical Engineering with 8+ years of experience in high-speed/precision analog layout designs in deep sub-micron process technologies (FinFET).
  • Experience in industry standard mask design/verification tools (Cadence/Synopsys, Calibre)
  • Hands-on custom layout design experience of high-speed SerDes blocks like Equalizers, PLL, Phase-Interpolators, CDR, etc.
  • Hands-on custom layout design experience of precision analog blocks like ADCs/DACs
  • Experience in floor planning, closing design sign-off with multiple rails/ESDs
  • Experience in integration of digital hard IPs
  • Experience in efficient DRC debugging, SKILL coding
  • Excellent oral and written communication skills.