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Intern Analog Layout Design Engineer Jobs in Rochester, NY

Fermilab

Jr. ASIC Design Engineer

Batavia, NY · Hybrid

$70K - $93K/yr

Performing a leading role in Analog and RF ASIC design projects, while being able to contribute ... Designing circuit networks using schematic entry and layout tools with full custom or timing-driven ...

Atalys, LLC

Mold Design Engineer

Rochester, NY

Create 2D prints of highly critical dimensional areas as well as general tooling layout packets ... engineering groups with design for manufacture issues and part improvements. * Perform mold CAE ...

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All JobsIntern Analog Layout Design Engineer JobsIntern Analog Layout Design Engineer Jobs in Rochester, NY

Intern Analog Layout Design Engineer information

See Rochester, NY salary details

$76K

$183.8K

$200.3K

How much do intern analog layout design engineer jobs pay per year?

As of Aug 14, 2026, the average yearly pay for intern analog layout design engineer in Rochester, NY is $183,756.00, according to ZipRecruiter salary data. Most workers in this role earn between $199,300.00 and $199,300.00 per year, depending on experience, location, and employer.

What is the difference between Intern Analog Layout Design Engineer vs Intern Digital Layout Design Engineer?

AspectIntern Analog Layout Design EngineerIntern Digital Layout Design Engineer
Required SkillsAnalog circuit fundamentals, layout design, SPICE simulationDigital circuit fundamentals, RTL design, layout automation tools
Work EnvironmentDesign teams focused on analog/mixed-signal ICsDesign teams focused on digital ICs and FPGA/ASIC design
Industry UsageSemiconductor companies, chip design firmsSemiconductor companies, FPGA/ASIC vendors

Intern Analog Layout Design Engineers focus on analog/mixed-signal IC layout, requiring knowledge of analog circuits and layout tools. Intern Digital Layout Design Engineers work on digital ICs, emphasizing digital design principles and automation. Both roles are common in semiconductor industries but differ in technical focus and tools used.

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For Intern Analog Layout Design Engineer jobs in Rochester, NY, the most frequently searched job titles are:

What job categories do people searching Intern Analog Layout Design Engineer jobs in Rochester, NY look for?

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Cities near Rochester, NY with the most Intern Analog Layout Design Engineer job openings:

Intern Analog Layout Design Engineer jobs near you
Infographic showing various Intern Analog Layout Design Engineer job openings in Rochester, NY as of August 2026, with employment types broken down into 1% Internship, 85% Full Time, 9% Part Time, and 5% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $183,756 per year, or $88.3 per hour.

PLL Design Engineer

Advanced Micro Devices, Inc

Rochester, NY • On-site

$156K/yr

Full-time

Posted 4 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 157 rated electronics manufacturers

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we're looking for talent who feel the same: people who want to leave the planet better than they found it, those who don't shy away from humanity's challenges but are determined to help solve them.
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you're designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger - technology that moves the world forward.
THE ROLE:
AMD is searching for an experienced Circuit Design Engineer to join the fast-growing PLL design team, responsible for defining, specifying, and implementing current and future advanced PLL IPs powering AMD products.
Join a dynamic team and give a boost to your personal career in a challenging and fascinating ever-growing, never-boring area! Looking forward to welcoming you in the team!
THE PERSON:
  • Solid knowledge Mixed Signal Circuit Design in FinFET technology specifically in PLLs and associated subblocks including VCO, charge-pump, dividers, state machines, LDO, feedback and compensation techniques, bandgap, TDC, interpolator circuits, high speed buffers etc.
  • Solid knowledge of industry standard tools and practices for analog circuit design
  • Good knowledge in Physical design, STA, methodology scripts (Tcl), knowledge on Perl, Python
  • Quality-oriented mindset
  • Strong and effective communication skills and team spirit

KEY RESPONSIBILITIES:
  • Design of complex building blocks of a PLL including architecture development and transistor level circuit design
  • Run pre-tapeout verification flows to confirm design meets performance, power, reliability and timing requirements.
  • Work closely with mask design engineers to deliver the physical design as well as define production/bench-level test plans with post-silicon characterization groups for silicon evaluation to ensure interlocked and high-quality execution
  • Lead/mentor junior engineers

PREFERRED EXPERIENCE:
  • Strong experience in the semiconductor industry
  • Experience in FinFET & Dual Patterning nodes such as 16/14/10/7nm
  • Hands-on design experience in performance analog and hybrid Phase Locked Loops, analog-to-digital (ADC), digital-to-analog (DAC) data converter, VCO, LDO, bandgap, charge pump, op-amps, interpolator circuits.
  • Experience with the following is a plus: Digital PLL techniques, TDC or DSP and control theory experience related to digital PLLs, Dual charge-pump PLL designs, Fractional-N PLLs, spread-spectrum PLLs.
  • Proficient with Cadence custom circuit design tools like ADE-L and ADE-XL and running Monte-Carlo, noise, aging, EM and IR drop simulations and stability analysis. Helic/EMX is a plus.
  • Have good experience with simulation tools such as Spectre, Hspice, AFS, and MATLAB, System Verilog, Python.
  • Capable of understanding DRC and LVS results with verification tools (Calibre, ICV, or like)
  • Proficiency in scripting languages like Perl, Python, matlab etc. is a plus.
  • Able to work effectively in a team, with good interpersonal skills, enthusiasm and positive energy
  • Possess strong analytical/problem solving skills and pronounced attention to details
  • Must be a self-starter, and able to independently drive tasks to completion

ACADEMIC CREDENTIALS:
  • Master's or Ph.D. in electrical engineering or equivalent preferred

LOCATION: Rochester, NE ( Open to other AMD Locations )
This role is not eligible for visa sponsorship.
#LI-SL3
#LI-HYBRID
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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