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Rtl Design Intern Jobs (NOW HIRING)

Etched

PD Intern

San Jose, CA · On-site

Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... advise RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You ...

Etched

PD Intern

San Jose, CA · On-site

Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... advise RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You ...

Tenstorrent University Jobs

$50/hr

As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... End-to-end physical design flow-from RTL handoff to final tapeout * Deep dive into timing, power ...

Micron

Intern - HBM SoC RTL Design Engineer

Folsom, CA · On-site

$38.84 - $50.24/hr

As a SoC Design Engineer Intern, you will be part of the Heterogeneous Integration Group (HIG ... Design and implement RTL for SoClevel blocks and subsystems used in HBM logic die. * Integrate ...

Analog Devices

Digital Design Engineer Intern

Durham, NC · On-site

$19 - $35/hr

As a Digital Design Engineer Intern at Analog Devices (ADI), you'll gain practical experience in ... Support RTL design and verification activities for digital modules and components * Use digital ...

Texas Instruments

As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...

Texas Instruments

As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...

Texas Instruments

As a Design Verification intern in this group, you will be responsible for: * Developing detailed ... Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital ...

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Rtl Design Intern information

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How much do rtl design intern jobs pay per hour?

As of Sep 8, 2026, the average hourly pay for rtl design intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What is an RTL design intern?

RTL Design Interns are students or recent graduates who assist with the design and verification of digital circuits at the Register Transfer Level (RTL) using hardware description languages like Verilog or VHDL. They typically work under the supervision of experienced engineers to help develop, simulate, and debug digital logic blocks that form the basis of processors, ASICs, or FPGAs. This internship provides hands-on experience in digital design, exposure to industry-standard tools, and an understanding of the full hardware development lifecycle.

What are some typical projects or tasks that an RTL design intern might work on during their internship?

As an RTL Design Intern, you can expect to assist with creating and verifying register-transfer level (RTL) code for digital circuits, which may involve writing code in hardware description languages like Verilog or VHDL. Interns often support senior engineers by running simulations, debugging logic errors, and documenting design specifications. You may also participate in design reviews and collaborate with verification, physical design, and software teams to ensure the design meets functional and timing requirements. This hands-on experience gives interns valuable insight into the full chip design cycle and helps build foundational skills for a career in hardware engineering.

What are the key skills and qualifications needed to thrive as an RTL design intern, and why are they important?

To thrive as an RTL Design Intern, you need a solid understanding of digital logic design, Verilog or VHDL programming, and coursework in computer architecture or electrical engineering. Familiarity with simulation tools like ModelSim, synthesis tools such as Synopsys or Cadence, and version control systems is highly valuable. Strong problem-solving abilities, attention to detail, and effective communication skills help you collaborate and troubleshoot design challenges. These skills and qualities are crucial for ensuring accurate, efficient hardware designs and successful integration within engineering teams.

What is the difference between Rtl Design Intern vs Digital Design Intern?

AspectRtl Design InternDigital Design Intern
Required CredentialsEnrolled in Electrical Engineering, Computer Engineering, or related fieldsEnrolled in Graphic Design, Visual Arts, or related fields
Work EnvironmentSemiconductor, electronics, or hardware companiesAdvertising agencies, media companies, or tech firms
Industry UsageUsed in chip design, FPGA development, ASIC projectsUsed in branding, UI/UX, digital media projects

Rtl Design Interns focus on hardware description languages and chip design, working in electronics and semiconductor environments. Digital Design Interns typically work on visual and user interface projects in media or tech companies. While both roles involve design skills, they serve different industries and technical focuses, making them distinct internship paths within the broader digital and hardware design fields.

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Rtl Design Intern jobs near you
Infographic showing various Rtl Design Intern job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.

PD Intern

San Jose, CA • On-site

Etched
See more jobs at Etchedexternal

Internship

Re-posted 3 days ago

Job description

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Physical Design intern for Etched, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
  • Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
  • Familiarity with high-speed digital logic
  • Exposure to ASIC or SoC design concepts
  • Familiarity with SystemVerilog, UVM, or Python
  • Familiarity with verification work and writing test benches
  • Familiarity with physical design flows and tooling
  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Strong candidates may also have experience with
  • Familiarity with modern ML and LLM model architectures
  • Familiarity with numerical representations and functions (RTL)
  • Familiarity with clocking and reset schemes (RTL/PD)
  • UVM or formal verification experience (DV)
  • Ability to program with Python or another scripting language

We encourage you to apply even if you do not believe you meet every single qualification.
Program details
  • 12-week paid internship
  • Generous housing support for those relocating
  • Daily lunch and dinner in our office
  • Based at our office in San Jose, CA
  • Direct mentorship from industry leaders and world-class engineers
  • Opportunity to work on one of the most important problems of our time

For any questions, contact internships@etched.com
How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

Apply