RTL Design Engineering Intern
$50K - $67K/yr
Join Teledyne Imaging Sensors as an RTL Design Engineering Intern Are you ready to launch your career to the next level? Join our mission-focused team, where we value technical excellence ...
$50K - $67K/yr
Join Teledyne Imaging Sensors as an RTL Design Engineering Intern Are you ready to launch your career to the next level? Join our mission-focused team, where we value technical excellence ...
$50K - $67K/yr
Join Teledyne Imaging Sensors as an RTL Design Engineering Intern Are you ready to launch your career to the next level? Join our mission-focused team, where we value technical excellence ...
Camarillo, CA · On-site
$50K - $67K/yr
Join Teledyne Imaging Sensors as an RTL Design Engineering Intern Are you ready to launch your career to the next level? Join our mission-focused team, where we value technical excellence ...
Camarillo, CA · On-site
$50K - $67K/yr
Join Teledyne Imaging Sensors as an RTL Design Engineering Intern Are you ready to launch your career to the next level? Join our mission-focused team, where we value technical excellence ...
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
Quick apply
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
Santa Clara, CA · On-site
$32.40 - $39/hr
What You Will Work On As an Intern on the Out-of-Order Core/Cache Design team, you will develop RTL ... Digital logic and RTL design principles. * The Chisel hardware design generator language. * High ...
Santa Clara, CA · On-site
$32.40 - $39/hr
What You Will Work On As an Intern on the Out-of-Order Core/Cache Design team, you will develop RTL ... Digital logic and RTL design principles. * The Chisel hardware design generator language. * High ...
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... End-to-end physical design flow-from RTL handoff to final tapeout * Deep dive into timing, power ...
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... End-to-end physical design flow-from RTL handoff to final tapeout * Deep dive into timing, power ...
$35 - $45/hr
RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications. * Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and ...
Quick apply
$35 - $45/hr
RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications. * Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and ...
San Jose, CA · On-site
$35 - $45/hr
RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications. * Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and ...
San Jose, CA · On-site
$35 - $45/hr
RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications. * Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and ...
San Jose, CA · On-site
Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. You will work with cutting-edge machine learning architectures, contribute to RTL block ...
Quick apply
San Jose, CA · On-site
Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. You will work with cutting-edge machine learning architectures, contribute to RTL block ...
$35 - $45/hr
RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications. * Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and ...
$35 - $45/hr
RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications. * Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and ...
San Jose, CA · On-site
Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. You will work with cutting-edge machine learning architectures, contribute to RTL block ...
San Jose, CA · On-site
Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. You will work with cutting-edge machine learning architectures, contribute to RTL block ...
San Jose, CA · On-site
$35 - $45/hr
About the Role We are seeking a Digital Hardware Intern to support the design, verification, and ... Youll contribute to RTL design, simulations, and performance optimization for real-world AI ...
San Jose, CA · On-site
$35 - $45/hr
About the Role We are seeking a Digital Hardware Intern to support the design, verification, and ... Youll contribute to RTL design, simulations, and performance optimization for real-world AI ...
San Jose, CA · On-site
$35 - $45/hr
About the Role We are seeking a Digital Hardware Intern to support the design, verification, and ... You'll contribute to RTL design, simulations, and performance optimization for real-world AI ...
San Jose, CA · On-site
$35 - $45/hr
About the Role We are seeking a Digital Hardware Intern to support the design, verification, and ... You'll contribute to RTL design, simulations, and performance optimization for real-world AI ...
$32.40 - $39/hr
What You Will Work On As an Intern on the Out-of-Order Core/Cache Design team, you will develop RTL ... Digital logic and RTL design principles. * The Chisel hardware design generator language. * High ...
$32.40 - $39/hr
What You Will Work On As an Intern on the Out-of-Order Core/Cache Design team, you will develop RTL ... Digital logic and RTL design principles. * The Chisel hardware design generator language. * High ...
San Jose, CA · On-site
$159K/yr
This role provides hands-on experience with RTL design, FPGA development, and SoC-level integration ... Student / Intern (Fixed Term) Shift: Shift 1 (United States of America) Primary Location: San Jose ...
New
San Jose, CA · On-site
$159K/yr
This role provides hands-on experience with RTL design, FPGA development, and SoC-level integration ... Student / Intern (Fixed Term) Shift: Shift 1 (United States of America) Primary Location: San Jose ...
New
Austin, TX · On-site
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... End-to-end physical design flow-from RTL handoff to final tapeout * Deep dive into timing, power ...
Austin, TX · On-site
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... End-to-end physical design flow-from RTL handoff to final tapeout * Deep dive into timing, power ...
San Jose, CA · On-site
$85K - $90K/yr
This role provides hands-on experience with RTL design, FPGA development, and SoC-level integration ... Student / Intern (Fixed Term) Shift: Shift 1 (United States of America) Primary Location: San Jose ...
San Jose, CA · On-site
$85K - $90K/yr
This role provides hands-on experience with RTL design, FPGA development, and SoC-level integration ... Student / Intern (Fixed Term) Shift: Shift 1 (United States of America) Primary Location: San Jose ...
RTL Development for FPGA targeted applications * Work with multiple FPGAs and toolchains ... This could be DSP/radio design, software, hi-rel design (e.g. fault analysis & recover), etc.
RTL Development for FPGA targeted applications * Work with multiple FPGAs and toolchains ... This could be DSP/radio design, software, hi-rel design (e.g. fault analysis & recover), etc.
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure ... with RTL, architecture, and validation teams. What We Need * Help develop and maintain ...
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure ... with RTL, architecture, and validation teams. What We Need * Help develop and maintain ...
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure ... with RTL, architecture, and validation teams. What We Need * Help develop and maintain ...
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure ... with RTL, architecture, and validation teams. What We Need * Help develop and maintain ...
$9.13 - $11.65
9% of jobs
$11.65 - $14.16
8% of jobs
$14.81 is the 25th percentile. Wages below this are outliers.
$14.16 - $16.67
28% of jobs
The median wage is $17.34 / hr.
$16.67 - $19.19
16% of jobs
$20.91 is the 75th percentile. Wages above this are outliers.
$19.19 - $21.70
20% of jobs
$21.70 - $24.21
9% of jobs
$24.21 - $26.73
4% of jobs
$26.73 - $29.24
1% of jobs
$29.24 - $31.75
1% of jobs
$31.75 - $34.27
1% of jobs
$34.27 - $36.78
2% of jobs
$9
$19
$36
| Aspect | Rtl Design Intern | Digital Design Intern |
|---|---|---|
| Required Credentials | Enrolled in Electrical Engineering, Computer Engineering, or related fields | Enrolled in Graphic Design, Visual Arts, or related fields |
| Work Environment | Semiconductor, electronics, or hardware companies | Advertising agencies, media companies, or tech firms |
| Industry Usage | Used in chip design, FPGA development, ASIC projects | Used in branding, UI/UX, digital media projects |
Rtl Design Interns focus on hardware description languages and chip design, working in electronics and semiconductor environments. Digital Design Interns typically work on visual and user interface projects in media or tech companies. While both roles involve design skills, they serve different industries and technical focuses, making them distinct internship paths within the broader digital and hardware design fields.
8.7
Based on 46 frontline employees who took The Breakroom Quiz
11th of 139 rated electronics manufacturers
Be visionary
Teledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research.
We are looking for individuals who thrive on making an impact and want the excitement of being on a team that wins.
Job Description
Join Teledyne Imaging Sensors as an RTL Design Engineering Intern
Are you ready to launch your career to the next level? Join our mission-focused team, where we value technical excellence, collaboration, and agility. We're the world's leading provider of infrared sensors for space, with customers like NASA, ESA, and the US Department of Defense.
What You'll Do:
Design and implement RTL modules for infrared sensor subsystems, including:
Pixel readout controllers
Timing generators
Highspeed data formatting and output interfaces
Write synthesizable Verilog/SystemVerilog that meets strict timing, power, and noisesensitivity constraints
Develop testbenches and run simulations to verify functionality and robustness
Support integration of digital logic with analog/mixedsignal blocks such as ADCs, ROICs, and sensor biasing circuits
Analyze simulation waveforms, debug RTL issues, and contribute to design reviews
Document design specifications, verification plans, and results
What You Need:
Pursuing a degree in Electrical Engineering, Computer Engineering, or a related field
Strong understanding of digital logic design and hardware description languages
Experience with Verilog or SystemVerilog
Familiarity with imaging systems, sensor architectures, or mixedsignal concepts is a plus
Exposure to FPGA development or ASIC design flows
Interest in infrared imaging, optics, or sensor physics
Strong analytical skills and a desire to learn how digital logic interacts with realworld analog signals
U.S. citizenship due to access restrictions.
What You'll Gain
Handson experience designing RTL for real infrared imaging sensors
Insight into how digital logic, analog circuits, and detector physics come together in a sensor system
Experience with industrystandard EDA tools and FPGA platforms
Mentorship from engineers working on stateoftheart IR imaging technologies
Opportunities to contribute to sensor prototypes used in aerospace, defense, industrial, and scientific applications
Why Teledyne? Our infrared sensors are "Everywhere You Look" - from the James Webb Space Telescope to climate change studies. Join us and make a difference!
Ready to take the next step? Apply now and become part of a team that's pushing the boundaries of technology and innovation.
#TS&I
Salary Range:
$50,600.00-$67,500.000The anticipated salary range listed for this role is only an estimate. Actual compensation for successful candidates is carefully determined based on several factors including, but not limited to, location, local regulations (such as minimum wage), education/training, work experience, key skills, and type of position.
Teledyne and all of our employees are committed to conducting business with the highest ethical standards. We require all employees to comply with all applicable laws, regulations, rules and regulatory orders. Our reputation for honesty, integrity and high ethics is as important to us as our reputation for making innovative sensing solutions.
Teledyne is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age, or any other characteristic or non-merit based factor made unlawful by federal, state, or local laws.
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Electrical equipment, appliance, and component manufacturing
5,001 - 10,000 Employees
Thousand Oaks, CA, US
1960