Physical Design Intern
San Jose, CA · On-site
$35 - $45/hr
As a Physical Design Intern, you will collaborate with experienced engineers to transform RTL ... Foundational understanding of VLSI design concepts, CMOS circuit design, and digital logic.
Physical Design Intern
San Jose, CA · On-site
$35 - $45/hr
As a Physical Design Intern, you will collaborate with experienced engineers to transform RTL ... Foundational understanding of VLSI design concepts, CMOS circuit design, and digital logic.
Physical Design Intern
$35 - $45/hr
As a Physical Design Intern, you will collaborate with experienced engineers to transform RTL ... Foundational understanding of VLSI design concepts, CMOS circuit design, and digital logic.
Quick apply
Apply Early
Physical Design Intern
$35 - $45/hr
As a Physical Design Intern, you will collaborate with experienced engineers to transform RTL ... Foundational understanding of VLSI design concepts, CMOS circuit design, and digital logic.
Apply Early
Physical Design Intern
$35 - $45/hr
As a Physical Design Intern, you will collaborate with experienced engineers to transform RTL ... Foundational understanding of VLSI design concepts, CMOS circuit design, and digital logic.
Physical Design Intern
$35 - $45/hr
As a Physical Design Intern, you will collaborate with experienced engineers to transform RTL ... Foundational understanding of VLSI design concepts, CMOS circuit design, and digital logic.
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... Solid understanding of logic design, VLSI, and transistor-level concepts * Familiar with PnR tools ...
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... Solid understanding of logic design, VLSI, and transistor-level concepts * Familiar with PnR tools ...
Physical Design Intern - CPU/AI Hardware
Austin, TX · On-site
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... Solid understanding of logic design, VLSI, and transistor-level concepts * Familiar with PnR tools ...
Physical Design Intern - CPU/AI Hardware
Austin, TX · On-site
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating ... Solid understanding of logic design, VLSI, and transistor-level concepts * Familiar with PnR tools ...
Good understanding of computer architecture, logic design and VLSI design. * Knowledge of System Verilog, Verilog, and Perl. * Knowledge of design verification, and functional coverage. * Ability to ...
Good understanding of computer architecture, logic design and VLSI design. * Knowledge of System Verilog, Verilog, and Perl. * Knowledge of design verification, and functional coverage. * Ability to ...
$18 - $23.50/hr
We are looking for talented engineers who possess a strong interest in VLSI design, programming and computer architecture. Ambarella designs complex SoCs which include custom DSP and computer vision ...
$18 - $23.50/hr
We are looking for talented engineers who possess a strong interest in VLSI design, programming and computer architecture. Ambarella designs complex SoCs which include custom DSP and computer vision ...
We are looking for talented software programmers who possess a strong interest in computer architecture, VLSI design, image processing, video compression, and computer vision. Architecture interns ...
We are looking for talented software programmers who possess a strong interest in computer architecture, VLSI design, image processing, video compression, and computer vision. Architecture interns ...
VLSI Systems Design or similar * Computer Architecture and Design or similar LikeBe the first to like this
VLSI Systems Design or similar * Computer Architecture and Design or similar LikeBe the first to like this
Senior/Staff CHAR Engineer
Phoenix, AZ · On-site
$140K - $210K/yr
... or VLSI logic and/or analog/RF design. * Proven experience in developing and deploying AI/ML ... OR, Bachelor's in same area with related intern or working experience Education:
Senior/Staff CHAR Engineer
Phoenix, AZ · On-site
$140K - $210K/yr
... or VLSI logic and/or analog/RF design. * Proven experience in developing and deploying AI/ML ... OR, Bachelor's in same area with related intern or working experience Education:
Senior/Staff CHAR Engineer
Phoenix, AZ · On-site
$140K - $210K/yr
... or VLSI logic and/or analog/RF design. * Proven experience in developing and deploying AI/ML ... OR, Bachelor's in same area with related intern or working experience Pay Range USD $140,000.00 ...
Senior/Staff CHAR Engineer
Phoenix, AZ · On-site
$140K - $210K/yr
... or VLSI logic and/or analog/RF design. * Proven experience in developing and deploying AI/ML ... OR, Bachelor's in same area with related intern or working experience Pay Range USD $140,000.00 ...
Vlsi Design Intern information
See salary details
$9.13 - $11.65
9% of jobs
$11.65 - $14.16
8% of jobs
$14.81 is the 25th percentile. Wages below this are outliers.
$14.16 - $16.67
28% of jobs
The median wage is $17.34 / hr.
$16.67 - $19.19
16% of jobs
$20.91 is the 75th percentile. Wages above this are outliers.
$19.19 - $21.70
20% of jobs
$21.70 - $24.21
9% of jobs
$24.21 - $26.73
4% of jobs
$26.73 - $29.24
1% of jobs
$29.24 - $31.75
1% of jobs
$31.75 - $34.27
1% of jobs
$34.27 - $36.78
2% of jobs
$9
$19
$36
How much do vlsi design intern jobs pay per hour?
As of Jul 5, 2026, the average hourly pay for vlsi design intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.
What types of projects or tasks can I expect to work on as a VLSI Design Intern?
As a VLSI Design Intern, you can expect to assist in the design, verification, and testing of integrated circuit (IC) components, often collaborating closely with experienced engineers. Typical tasks include coding in HDLs for logic implementation, running simulations, supporting layout and timing analysis, and participating in debugging sessions. You may also help prepare technical documentation and contribute to project reviews. This hands-on experience provides a valuable opportunity to apply your classroom knowledge to real-world chip design challenges and builds the foundation for future roles in semiconductor engineering.
What is a VLSI Design Intern job?
A VLSI Design Intern works on designing, testing, and verifying integrated circuits and semiconductor devices. Interns typically assist in RTL design, circuit simulation, and layout verification using industry-standard tools. They collaborate with engineers to optimize performance, power, and area constraints. This role provides hands-on experience with chip design methodologies and exposure to the full VLSI design flow.
What are the key skills and qualifications needed to thrive in the Vlsi Design Intern position, and why are they important?
To thrive as a VLSI Design Intern, you need a solid understanding of digital and analog circuit design principles, knowledge of semiconductor device physics, and familiarity with relevant coursework in electrical or electronics engineering. Experience with hardware description languages (HDLs) like Verilog or VHDL, as well as proficiency in Electronic Design Automation (EDA) tools such as Cadence or Synopsys, is highly beneficial. Strong problem-solving abilities, attention to detail, and effective communication skills help interns contribute effectively to project teams. These competencies enable interns to support complex chip design tasks and succeed in collaborative, fast-paced engineering environments.
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$35 - $45/hr
Internship
Posted 5 days ago
Job description
About the Company:
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.
We're looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change - we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.
About the Role: Join our Physical Design team to help deliver next-generation SSD controller chips. As a Physical Design Intern, you will collaborate with experienced engineers to transform RTL designs into functional physical layouts. You will gain hands-on experience in the complete ASIC flow from synthesis to tape-out, working on real projects in a fast-paced, innovative environment.
Responsibilities:
Minimum Qualifications:
Preferred Qualifications:
COMPENSATION: $35/hr - $45/hr
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.
We're looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change - we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.
About the Role: Join our Physical Design team to help deliver next-generation SSD controller chips. As a Physical Design Intern, you will collaborate with experienced engineers to transform RTL designs into functional physical layouts. You will gain hands-on experience in the complete ASIC flow from synthesis to tape-out, working on real projects in a fast-paced, innovative environment.
Responsibilities:
- Execute ASIC physical design implementation flows, including floorplanning, placement, clock tree synthesis (CTS), and routing.
- Perform static timing analysis (STA) and work to resolve setup and hold timing violations.
- Run and analyze design rule checks (DRC) and layout versus schematic (LVS) checks to ensure design integrity, as well as IR-Drop analysis.
- Assist in optimizing power, performance, and area (PPA) metrics using industry-standard EDA tools.
- Developing entire P&R/physical verification/IR-EM flows.
- Collaborate with front-end design and verification teams to seamlessly integrate RTL changes and resolve physical design constraints.
- Help generate and maintain physical design scripts, utilities, and documentation for the team.
Minimum Qualifications:
- Currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Foundational understanding of VLSI design concepts, CMOS circuit design, and digital logic.
- Familiarity with the basic stages of the ASIC physical design flow.
- Academic or project experience with scripting languages such as Python, Perl, or TCL.
- Strong analytical and problem-solving skills with a high attention to detail.
Preferred Qualifications:
- Hands-on coursework or project experience with industry-standard EDA tools (e.g., Synopsys ICC2, Cadence Innovus, or similar).
- Exposure to Static Timing Analysis (STA) concepts and tools (e.g., PrimeTime, Tempus).
- Basic understanding of design constraints (SDC) and library exchange formats (LEF/DEF).
- Knowledge of low-power design techniques and power intent formats (UPF/CPF).
- Familiarity with AI/LLM tools (e.g., GPT, Copilot) and prompt engineering, with the ability to leverage them to automate EDA scripting, analyze design data, or optimize workflows.
COMPENSATION: $35/hr - $45/hr
About SK hynix memory solutions
Sourced by ZipRecruiter
Company size
201 - 500 Employees
Headquarters location
San Jose, CA, US
Year founded
2004