Solutions Architect
Memphis, TN · Hybrid
$18K/mo
... Chip initiatives to enable preferred global Pickup & Delivery on-road capabilities ... Leveraging advanced AI tools and technologies, the architect will organize and direct development ...
Solutions Architect
Memphis, TN · Hybrid
$18K/mo
... Chip initiatives to enable preferred global Pickup & Delivery on-road capabilities ... Leveraging advanced AI tools and technologies, the architect will organize and direct development ...
The data center engineering team thinks from chip to chiller (or electrical substation ... Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable ...
The data center engineering team thinks from chip to chiller (or electrical substation ... Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable ...
Construction Manager - Data Center Design, Engineering and Construction
Gallatin, TN · On-site
$150K - $209K/yr
The data center engineering team thinks from chip to chiller (or electrical substation ... AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains ...
Construction Manager - Data Center Design, Engineering and Construction
Gallatin, TN · On-site
$150K - $209K/yr
The data center engineering team thinks from chip to chiller (or electrical substation ... AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains ...
Ai Chip Design Rtl information
What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?
| Aspect | Ai Chip Design Rtl | Ai Chip Verification Engineer |
|---|---|---|
| Primary Focus | Developing and implementing Register Transfer Level (RTL) code for AI chips | Verifying and validating RTL designs to ensure functionality |
| Skills Required | HDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledge | Simulation, testbench creation, debugging, scripting skills |
| Work Environment | Design teams, hardware development labs, EDA tools | Verification teams, simulation environments, test setups |
| Certifications | Hardware design certifications, FPGA/ASIC training | Verification methodologies, UVM, SystemVerilog certifications |
While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.
What are some common challenges faced by AI Chip Design RTL engineers during the verification process?
AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.
What are AI Chip Design RTL engineers?
AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.
What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?
To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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$18K/mo
Full-time
Posted 25 days ago
Job description
Under limited guidance, work at the business unit level developing the end-to-end solution architecture for significant initiatives in partnership with key business and IT stakeholders.
As a key leadership role, the Solution Architect for the Conveyance Agile Release Train will drive the modernization of the Pickup and Delivery (P&D) Conveyance ecosystem, focusing on Network 2.0 Purple Chip initiatives to enable preferred global Pickup & Delivery on-road capabilities. Leveraging advanced AI tools and technologies, the architect will organize and direct development team workstreams, leading the migration of the core applications such as Manifest, LEO, and FORGE to the cloud and Preferred Future State. Additionally, this position is responsible for integrating AI capabilities into day-to-day engineering workflows using tools like Atlas and copilot assistants, while strictly upholding strong software design fundamentals, system reliability, and enterprise security standards.
The position will be initially focused on the Network 2.0 Purple Chip initiatives to enable the preferred global Pickup and Delivery ecosystem, specific to on road capabilities.
Essential Functions
- Exposes current state architecture and identifies options for future state architecture.
- Works closely with business and IT stakeholders creating solutions that balance competing interests and concerns.
- Develops plans for and facilitates the migration from current to selected future state by providing technical leadership to multiple initiatives.
- Mentor those in less senior positions.
- Perform other duties as assigned.
Preferred Qualifications
- Seamlessly integrate AI services with legacy core logistics and tracking applications.
- Leverages AI tools (e.g., copilots, code generation, automated testing) to accelerate software architecture work.
- Integrate AI capabilities into daytoday engineering workflows while maintaining strong fundamentals in software design, reliability, and security.
- Strong background and technical/operational knowledge specific to on-road pickup & delivery capabilities.
- Experience or foundational knowledge of Global Pickup and Delivery ecosystem and Network 2.0 Purple Chip initiatives.
Minimum Education
Bachelor's degree in computer science, engineering, information Systems, business and/or equivalent formal training or work experience.
Minimum Experience
Five (5) years equivalent work experience in information technology or engineering environment. A related advanced degree may offset the related experience requirement.
Domicile Information
This is a hybrid position located in any of the following - Memphis TN, Plano/Dallas TX, and Pittsburgh PA. Candidates must live within 50 miles of the campus location. Employees will be required to work at the FedEx campus location several times per week.
Pay Transparency Posting Ranges
USA: $8,007.29/mo - $18,149.85/mo, CO: $8,007.29/mo - $17,393.61/mo, CA: $8,452.14/mo - $14,413.11/mo, NJ: $8,452.14/mo - $13,523.42/mo, ME, OH & VT: $8,452.14/mo - $15,124.88/mo, MN: $8,452.14/mo - $16,637.36/mo, IL & NV: $8,452.14/mo - $17,393.61/mo, MD, NY, VA & WA: $8,452.14/mo - $18,149.85/mo, MA: $8,896.99/mo - $18,149.85/mo, RI: $9,786.68/mo - $16,637.36/mo, CT: $9,786.68/mo - $17,393.61/mo, DC & HI: $10,231.53/mo - $17,393.61/mo, NYC: $10,231.53/mo - $18,149.85/mo
Preferred Qualifications:
Pay Transparency:
Pay:
Additional Details:
For details on our comprehensive benefits, click here.
Federal Express Corporation is an Equal Opportunity Employer including, Vets/Disability.
Reasonable accommodations are available for qualified individuals with disabilities throughout the application process. Applicants who require reasonable accommodations in the application or hiring process should contact recruitmentsupport@fedex.com.
Applicants have rights under Federal Employment Laws:
- Know Your Rights
- Pay Transparency
- Family and Medical Leave Act (FMLA)
- Employee Polygraph Protection Act
E-Verify Program Participant: Federal Express Corporation participates in the Department of Homeland Security U.S. Citizenship and Immigration Services' E-Verify program (For U.S. applicants and employees only). Please click below to learn more about the E-Verify program:
- E-Verify Notice (bilingual)
- Right to Work Notice (English) / (Spanish)