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Senior Design Verification Engineer Jobs (NOW HIRING)

Mythic

Senior Design Verification Engineer

Austin, TX · On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life. About Us: Mythic is ...

Altera

Senior Design Verification Engineer

San Jose, CA · On-site

$142K - $206K/yr

As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying out design validation for Altera next generation IP's across the Altera FPGA IP product portfolios.

Cirrus Logic

Senior Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems ...

Mythic

Senior Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life. About Us: Mythic is ...

Micron

Sr. Design Verification Engineer

Minneapolis, MN · On-site

$142K - $173K/yr

Our ASIC Design Verification team develops robust, scalable verification environments for highly ... Bachelor's or Master's degree in Electrical Engineering or Computer Engineering, or equivalent ...

Mythic

Senior Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life. About Us: Mythic is ...

Correct Designs

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineer ID: 1063 Location: Austin, TX More about this job > Description Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position ...

Correct Designs

Design Verification Engineer

Austin, TX

$134K - $164K/yr

Design Verification Engineer ID: 1058 Location: Austin, TX More about this job > Description Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position ...

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Senior Design Verification Engineer information

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How much do senior design verification engineer jobs pay per year?

As of Aug 5, 2026, the average yearly pay for senior design verification engineer in the United States is $121,466.00, according to ZipRecruiter salary data. Most workers in this role earn between $95,000.00 and $138,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a senior design verification engineer?

A Senior Design Verification Engineer requires deep expertise in digital design principles, verification methodologies (such as UVM or OVM), and a degree in electrical or computer engineering. Familiarity with hardware description languages (like Verilog or VHDL), simulation tools (e.g., Synopsys VCS, Cadence Incisive), and scripting languages (such as Python or TCL) is typically expected. Exceptional problem-solving, attention to detail, and strong communication skills help in collaborating with cross-functional teams and navigating complex verification challenges. These skills and qualifications are vital to ensure robust, high-quality hardware designs that meet performance and reliability standards.

How much does a senior design verification engineer make?

A senior design verification engineer typically earns between $100,000 and $150,000 annually, depending on experience, location, and industry. They often have expertise in hardware description languages like VHDL or Verilog and may hold certifications such as Certified Verification Engineer (CVE).

What is the difference between Senior Design Verification Engineer vs Design Verification Engineer?

AspectSenior Design Verification EngineerDesign Verification Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field; experience in verification tools and methodologiesBachelor's degree in Electrical Engineering, Computer Engineering, or related field; entry-level experience in verification
Work EnvironmentDesign teams, hardware/software verification labs, collaborative projectsVerification teams, testing labs, development environments
Employer & Industry UsageSemiconductor, electronics, hardware development companiesSimilar industries, often as entry or mid-level roles within verification teams

The main difference is experience level and responsibility. Senior Design Verification Engineers typically lead verification efforts, mentor junior staff, and handle complex verification tasks, while Design Verification Engineers focus on executing verification plans and testing designs under supervision. Both roles require similar technical skills and industry knowledge, but the senior role involves more leadership and strategic planning.

What is a senior design verification engineer?

Senior Design Verification Engineers are experienced professionals responsible for ensuring that hardware designs, such as integrated circuits or system-on-chip (SoC) components, meet all functional specifications and quality standards before manufacturing. They create and execute verification plans, develop testbenches, and use simulation tools to identify and resolve design issues. Their expertise helps prevent costly errors, ensuring reliable and functional products. Typically, they collaborate closely with design, validation, and product engineering teams and often mentor junior engineers.

What are some typical challenges faced by senior design verification engineers when working on complex chip designs?

Senior Design Verification Engineers often encounter challenges such as managing verification of increasingly complex and large-scale integrated circuits, ensuring comprehensive coverage, and identifying hard-to-find corner-case bugs. They frequently collaborate across cross-functional teams, including design, firmware, and test engineering, to clarify specifications and resolve issues. Effective communication and a proactive approach to debugging and process improvement are critical, as is keeping up with evolving verification methodologies and tools to ensure high-quality, on-time project delivery.
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Senior Design Verification Engineer jobs near you
Infographic showing various Senior Design Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 88% Full Time, 9% Part Time, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $121,466 per year, or $58.4 per hour.

Senior Design Verification Engineer

Mythic

Austin, TX • On-site

$120K - $225K/yr

Full-time

Re-posted 29 days ago

Job description

We’re hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.
 
About Us:
Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.
 
We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.
 
The salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.
 
Design Verification at Mythic:
At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.
 
Because today’s AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches—combining simulation, modeling, and innovative verification strategies—to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.
Responsibilities
  • Hands-on system-level and block-level verification.
  • Development of test plans and coverage plans.
  • Testbench development and execution using UVM or other advanced DV methodologies.
  • Creation of verification infrastructure and flows.
  • Leverage architecture models and emulation environments to help verify large AI network functionality on the design.
  • Collaborate with RTL designers and architects to verify subsystems such as scheduling fabrics, interconnects, DMA engines, and memory controllers.
Requirements
  • Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 8+ years of industry experience developing verification testbenches.
  • Knowledge of verification methodologies (UVM or similar).
  • Solid understanding of computer architecture, including datapaths, memory hierarchies, and interconnects.
  • Experience verifying one or more of the following: scheduling subsystems, high-performance interconnects, DMA engines, or memory subsystems.
  • Understanding of Verilog, SystemVerilog, and UVM.
  • Proven track record of first-pass silicon success.
  • Strong communication skills, both written and spoken.
Preferred Qualifications
  • Experience with emulation or FPGA prototyping for large-scale designs.
  • Knowledge of coverage-driven verification and advanced stimulus generation techniques.
  • Exposure to formal verification methods and tools.
  • Familiarity with power-aware and performance-driven verification flows.
  • Prior experience verifying AI, DSP, or other highly parallel architectures.
  • Strong scripting skills (Python or similar) for automation and infrastructure development.
At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.