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Asic Design Jobs (NOW HIRING)

Blue Origin

ASIC Design Engineer

Van Horn, TX · On-site

The ASIC Design Engineer contributes to the design of digital IP blocks for advanced Satellite communication ASICs. This role is an excellent opportunity to grow technical depth in RTL design ...

Ayar Labs

Sr. Engineer, ASIC Design

San Jose, CA · On-site

$160K - $192K/yr

Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...

Credo, Inc

Principal ASIC Design Engineer

San Jose, CA · On-site

$180K - $210K/yr

About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · Hybrid

NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...

Credo, Inc

Principal ASIC Design Engineer

San Jose, CA · On-site

$180K - $210K/yr

About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...

Kratos Defense

ASIC Design Leader

Crane, IN

... of ASIC development * 2+ years of design implementation and verification using Verilog/VHDL * 5+ years of experience with FPGAs with knowledge of Verilog/VHDL * 5+ years of experience with testing ...

Cornelis Networks

PCIe ASIC Design Engineer

Austin, TX · On-site +1

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

Ayar Labs

Sr. Staff Engineer, ASIC Design

San Jose, CA · On-site

$180K - $223K/yr

Sr. Staff Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using ...

Ayar Labs

Sr. Engineer, ASIC Design

San Jose, CA · On-site

$160K - $192K/yr

Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...

A4G Solutions LLC

ASIC designer

Waukesha, WI · On-site

$40 - $50/hr

The successful candidate will interface with ASIC simulation & design teams, and Hardware Subsystem teams to help deliver mixed-signal and digital ASIC design solutions. Essential Responsibilities ...

Jobsbridge

ASIC Engineer

San Jose, CA · On-site

$194K/yr

ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal (Cadence Tool for formal verification) Description: Should have 2-5 years of experience in FPGA/ASIC ...

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Asic Design information

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$94K

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How much do asic design jobs pay per year?

As of Jul 13, 2026, the average yearly pay for asic design in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

Is ASIC a good career?

ASIC design is a specialized engineering field focused on developing custom integrated circuits, requiring skills in digital design, hardware description languages, and verification tools. It offers strong job prospects due to the demand for high-performance electronics in industries like consumer electronics, automotive, and telecommunications. The role often involves collaboration with multidisciplinary teams and may require certifications or experience with FPGA or ASIC design flows.

What engineer makes $500,000 a year?

In the field of ASIC design, senior engineers with extensive experience, specialized skills in hardware description languages, and leadership roles can earn salaries approaching or exceeding $500,000 annually, especially in high-cost-of-living areas or large tech companies. Such compensation often includes bonuses, stock options, and other incentives for top-tier professionals in the industry.

How much do ASIC designers make?

ASIC designers typically earn between $80,000 and $150,000 annually, depending on experience, location, and company size. Senior roles or those with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $180,000.

What are the key skills and qualifications needed to thrive as an ASIC Design Engineer, and why are they important?

To thrive as an ASIC Design Engineer, you need a solid background in digital design principles, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with EDA tools like Cadence or Synopsys, as well as knowledge of simulation and verification methodologies, is typically required. Strong problem-solving abilities, attention to detail, and effective teamwork are crucial soft skills in this role. These competencies ensure accurate, efficient chip designs and smooth collaboration throughout complex development cycles.

What is the difference between Asic Design vs FPGA Design?

AspectAsic DesignFPGA Design
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; knowledge of VLSI designSimilar credentials; often requires knowledge of FPGA programming languages like VHDL/Verilog
Work EnvironmentDesigning custom chips in semiconductor labs or design housesImplementing and testing designs on FPGA boards in labs or development environments
Industry UsageUsed in high-volume, performance-critical applications like smartphones, serversUsed for prototyping, testing, and low to medium volume applications

While both Asic Design and FPGA Design involve hardware description languages and digital logic, Asic Design focuses on creating custom chips for high-volume production, requiring detailed fabrication knowledge. FPGA Design emphasizes flexible, reprogrammable hardware for testing and prototyping. Understanding these differences helps professionals choose the right career path or project focus within the hardware design industry.

Is ASIC design in demand?

ASIC design is in high demand due to the growth of specialized hardware for applications like AI, 5G, and IoT. Professionals with skills in hardware description languages such as VHDL or Verilog, and experience with FPGA prototyping, are particularly sought after in the industry.

What are some common challenges faced by ASIC Design Engineers during the chip development process?

ASIC Design Engineers often encounter challenges such as balancing power, performance, and area (PPA) constraints while meeting tight project deadlines. Debugging complex hardware issues during simulation and verification phases requires keen analytical skills and attention to detail. Collaboration with cross-functional teams—including verification, physical design, and test engineering—is essential to ensure design specifications are met and to address integration issues. Staying updated with evolving EDA tools and methodologies is also crucial for success in this fast-paced field.

What are ASIC designers?

ASIC designers are engineers who specialize in creating application-specific integrated circuits (ASICs), which are custom-designed semiconductor chips tailored for a particular use or product. They are responsible for designing, verifying, and testing hardware components at the microchip level to ensure optimal performance and efficiency. ASIC designers work closely with electronic design automation (EDA) tools, collaborate with software and hardware teams, and follow rigorous design cycles to meet project specifications. Their work is crucial in industries such as telecommunications, consumer electronics, automotive, and data centers where custom silicon solutions are required.
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Asic Design jobs near you
Infographic showing various Asic Design job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 1% Part Time, 2% Contract, and 2% Summer. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.

Principal ASIC Design Engineer

Credo Semiconductor, Inc.

San Jose, CA • On-site

Other

Re-posted yesterday

Job description

Salary: $180,000 $210,000 per year

Credo is engineering the future of high-speed connectivity for the AI-driven world.With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers.


Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure.


At Credo, youll be part of a team of world-class technologists and engineers that thrive on pushing the limits of whats possible for some of the worlds most important companies. Our portfolio includes cutting edge solutions including our software,optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables(AECs) all designed for maximum performance, energy efficiency, and scalability.


We foster a culture oftechnical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale.


Join us and help us architect the next generation of disruptive networking technologies because at Credo, We Connect.


About the Role

As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will collaborate with PD, DFT, STA, and integration teams to ensure successful tape-outs and work closely with system teams for chip bring-up and validation.


Responsibilities

  • Design, implement, and debug complex logic blocks.
  • Integrate complex IPs from internal and external vendors.
  • Support front-end integration activities such as Lint, CDC, synthesis, and ECO.
  • Participate in design and code reviews to ensure quality.
  • Develop functional tests/testbenches and run RTL and gate-level simulations.
  • Work with verification, DFT, and physical design engineers to achieve successful tape-outs.
  • Bring up, validate, and debug chip features; collaborate with software, firmware, and systems teams.


Basic Qualifications

  • BS/MS degree in Electrical Engineering or Computer Science.
  • 10+ years of relevant ASIC design experience.
  • Strong understanding of digital logic design and complex synchronous/asynchronous interfaces.
  • Proficiency in Verilog/SystemVerilog RTL design.
  • Knowledge of synthesis and static timing analysis.
  • Experience developing testbenches and test cases; familiarity with UVM.
  • Experience with gate-level simulations, chip bring-up, and validation.
  • Proven track record of successful production tape-outs.


Preferred Qualifications

  • Expertise in scripting languages (Python, Tcl, Perl, Shell).
  • Familiarity with DFT methodology and physical design flow.
  • Hands-on experience with STA and timing closure.
  • Strong problem-solving and planning skills.
  • Excellent communication and collaboration abilities.


The base salary range for this position is $180,000 $210,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.


Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.


If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email people@credosemi.com.