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Asic Design Manager Jobs (NOW HIRING)

Senior Manager, Asic Design Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier ...

Reporting to the Hardware Engineering Manager, you'll collaborate closely with a talented group of ... Establish ASIC design processes internal to Atom Computing by defining methodologies across ...

Principal ASIC Design Engineer

Austin, TX · On-site

$180K - $220K/yr

Reporting to the Hardware Engineering Manager, you'll collaborate closely with a talented group of ... Establish ASIC design processes internal to Atom Computing by defining methodologies across ...

Principal ASIC Design Engineer

Austin, TX · On-site

$180K - $220K/yr

Reporting to the Hardware Engineering Manager, you'll collaborate closely with a talented group of ... Establish ASIC design processes internal to Atom Computing by defining methodologies across ...

Reporting to the Hardware Engineering Manager, you'll collaborate closely with a talented group of ... Establish ASIC design processes internal to Atom Computing by defining methodologies across ...

Reporting to the Hardware Engineering Manager, you'll collaborate closely with a talented group of ... Establish ASIC design processes internal to Atom Computing by defining methodologies across ...

Principal ASIC Design Engineer

Austin, TX · On-site

$180K - $220K/yr

Reporting to the Hardware Engineering Manager, you'll collaborate closely with a talented group of ... Establish ASIC design processes internal to Atom Computing by defining methodologies across ...

Our group is developing Medtronic's next generation of Cardiac Rhythm Management (CRM) products ... As a member of this Design Team, the Principal ASIC Design Engineer can be involved in all phases ...

Reporting to the Hardware Engineering Manager, you'll collaborate closely with a talented group of ... Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.

Our group is developing Medtronic's next generation of Cardiac Rhythm Management (CRM) products ... As a member of this Design Team, the Principal ASIC Design Engineer can be involved in all phases ...

What You Can Expect We are seeking an experienced Senior Manager, ASIC Design to lead our ASIC chip design team. Reporting to the Senior Director, ASIC Engineering, you will manage a team and oversee ...

About the Role As a Director, ASIC Design you will lead the development of advanced ASIC solutions ... Manage design & verification teams for large, high-speed ASICs. * Project planning & execution:

Director, ASIC Design

San Jose, CA · On-site

$210K - $240K/yr

About the Role As a Director, ASIC Design you will lead the development of advanced ASIC solutions ... Manage design & verification teams for large, high-speed ASICs. * Project planning & execution:

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Asic Design Manager information

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$42K

$114.5K

$201.5K

How much do asic design manager jobs pay per year?

As of Jun 6, 2026, the average yearly pay for asic design manager in the United States is $114,491.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,500.00 and $144,000.00 per year, depending on experience, location, and employer.

What is the difference between Asic Design Manager vs Asic Design Engineer?

AspectAsic Design ManagerAsic Design Engineer
ResponsibilitiesOversees ASIC design projects, manages teams, and coordinates with stakeholdersPerforms ASIC design, coding, simulation, and verification tasks
Required SkillsLeadership, project management, ASIC design knowledgeHardware description languages, circuit design, verification skills
ExperienceTypically 8+ years in ASIC design, with leadership experienceUsually 2-5 years in ASIC design roles
Work EnvironmentDesign teams, project planning, cross-functional collaborationDesign labs, simulation environments, coding and testing

The main difference between an Asic Design Manager and an Asic Design Engineer lies in their roles. The manager oversees projects and teams, focusing on leadership and coordination, while the engineer concentrates on technical ASIC design and implementation. Both roles require ASIC design expertise, but the manager's role is more strategic and supervisory.

What are the key skills and qualifications needed to thrive as an ASIC Design Manager, and why are they important?

To thrive as an ASIC Design Manager, you need expertise in digital and analog ASIC design, project management experience, and typically a degree in electrical engineering or a related field. Familiarity with industry-standard EDA tools (such as Cadence or Synopsys), verification methodologies, and knowledge of relevant design flows is crucial. Strong leadership, communication, and problem-solving skills help manage teams and coordinate with cross-functional stakeholders. These competencies ensure high-quality chip designs are delivered on time and meet performance and cost targets, which is vital for organizational success.

What are some common challenges faced by an ASIC Design Manager in leading multidisciplinary teams?

ASIC Design Managers often navigate the complexities of coordinating multidisciplinary teams, including digital, analog, verification, and physical design engineers. One common challenge is ensuring clear communication across these specialties to maintain alignment on project goals, timelines, and technical requirements. Additionally, managing shifting priorities, resolving technical bottlenecks, and balancing resource allocation are frequent hurdles. Successful managers foster collaboration, set clear expectations, and leverage structured project management practices to keep teams productive and motivated.

What does an ASIC Design Manager do?

An ASIC Design Manager oversees the design and development of Application Specific Integrated Circuits (ASICs), managing a team of engineers through the entire chip design process. They coordinate project timelines, ensure technical specifications are met, and facilitate communication between design, verification, and manufacturing teams. Their role also involves resource planning, risk management, and ensuring that the final product meets performance, cost, and quality targets.
More about Asic Design Manager jobs
What cities are hiring for Asic Design Manager jobs? Cities with the most Asic Design Manager job openings:
What are the most commonly searched types of Asic Design jobs? The most popular types of Asic Design jobs are:
What states have the most Asic Design Manager jobs? States with the most job openings for Asic Design Manager jobs include:
Infographic showing various Asic Design Manager job openings in the United States as of May 2026, with employment types broken down into 6% Locum Tenens, 28% Internship, 22% As Needed, and 44% Full Time. Highlights an 86% Physical, 9% Hybrid, and 5% Remote job distribution, with an average salary of $114,491 per year, or $55 per hour.
Digital ASIC Design Manager

Digital ASIC Design Manager

Keysight Technologies

Colorado Springs, CO • On-site

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

This job post has expired today. Applications are no longer accepted.


Keysight Technologies rating

8.1

Company rating: 8.1 out of 10

Based on 19 frontline employees who took The Breakroom Quiz

40th of 139 rated electronics manufacturers


Job description

Digital Design Asic R&D Manager

Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.

Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.

This role sits within Keysight Laboratories—a globally recognized technology organization that enables Keysight to be first to market with breakthrough, highly differentiated solutions. Our team of senior engineers has delivered generations of innovation across ASIC and product development, spanning the breadth of the technology landscape. You'll join a high-performance, globally connected engineering organization designing and delivering next-generation Digital ASICs.

A sustained driver of Keysight's success is the creation and deployment of breakthrough digital and mixed-signal ASICs that unlock step-function performance and customer value in new products. We are seeking a Digital Design ASIC R&D Manager to lead and grow this capability within our ASIC team.

The role is based in Colorado Springs at the foot of Pikes Peak, with a purpose-built development campus that brings engineering, advanced technology development, assembly, and machining together in one location. Outside the lab, the campus supports an active lifestyle with on-site fitness and recreation, and Colorado Springs offers exceptional quality of life—immediate access to world-class outdoor activities, year-round recreation, and more than 300 days of sunshine each year.

Responsibilities

  • Set and drive the technical strategy for digital IP, block-level design, verification, and full-chip integration—aligning architectural choices to product differentiation, schedule, and long-term reuse.
  • Lead, mentor, and scale a high-performing organization of architects, RTL designers, and verification engineers; establish clear technical expectations and a culture of ownership and excellence.
  • Own program delivery from concept through tapeout and into productization—planning resources, managing schedules and milestones, and proactively driving risk retirement and trade-off decisions.
  • Influence outcomes across the broader silicon ecosystem by partnering tightly with physical design, DFT/test, IP, software/firmware, packaging, systems engineering, and foundry/OSAT partners.
  • Establish and enforce robust quality and signoff discipline, including design reviews, coding standards, verification closure, timing and power closure, area/constraints management, and manufacturability/yield considerations.
  • Build a world-class team: recruit and hire top talent, develop technical leaders, and manage performance and career growth to retain key capabilities.
  • Manage the operating model for the team, including budget ownership, EDA/tool strategy, license planning, and vendor/partner selection.
  • Drive continuous improvement in productivity and predictability through design flows, automation, CI/regression infrastructure, and disciplined IP reuse strategies.

Qualifications

Must-have Qualifications

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or equivalent practical experience.
  • 7+ years of digital IC/ASIC development experience, with demonstrated progression in technical leadership (people management experience preferred).
  • Strong hands-on depth in RTL micro-architecture and implementation (SystemVerilog/Verilog/VHDL), synthesis, STA/timing closure, and power/performance optimization.

Preferred Qualifications

  • Deep expertise in modern verification, including constrained-random methodology, formal techniques, and acceleration/emulation.
  • Working knowledge of the full silicon lifecycle and cross-functional handoffs, including physical design, DFT/scan, signoff flows, and foundry enablement.
  • Proven ability to deliver complex programs to tapeout—building credible plans, managing dependencies and risk, and driving alignment across multiple teams.
  • Proficiency with industry-standard EDA environments (e.g., Cadence and Siemens/Mentor) and productivity scripting/automation (Python, Tcl, and/or Ruby).
  • Executive-level communication skills and strong stakeholder management—able to translate technical trade-offs into clear decisions and commitments.
  • Sound judgment under schedule pressure, with a track record of prioritizing the right trade-offs while maintaining quality.
  • Demonstrated people leadership strengths, including mentoring and coaching engineers, developing technical leaders, and building a strong team culture of accountability, learning, and engineering excellence.

ITAR statement: This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Employment in this position for non-U.S. persons is contingent on Keysight's ability to obtain any required government authorizations.

We are unable to support visa sponsorship for this position.

Most offers will be between the minimum and the midpoint of the Salary Range listed below.

MIN $151,000.00 - MAX $253,000.00

Note: For other locations, pay ranges will vary by region

US Employees may be eligible for the following benefits:

  • Medical, dental and vision
  • Health Savings Account
  • Health Care and Dependent Care Flexible Spending Accounts
  • Life, Accident, Disability insurance
  • Business Travel Accident and Business Travel Health
  • 401(k) Plan
  • Flexible Time Off, Paid Holidays
  • Paid Family Leave
  • Discounts, Perks
  • Tuition Reimbursement
  • Adoption Assistance
  • ESPP (Employee Stock Purchase Plan)

Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***


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