Apple's Silicon Security team is looking for a driven ASIC Design Engineer to build the secure ... Experience with hardware security concepts including key management, physical attack and ...
Apple's Silicon Security team is looking for a driven ASIC Design Engineer to build the secure ... Experience with hardware security concepts including key management, physical attack and ...
Apple's Silicon Security team is looking for a driven ASIC Design Engineer to build the secure ... Experience with hardware security concepts including key management, physical attack and ...
Apple's Silicon Security team is looking for a driven ASIC Design Engineer to build the secure ... Experience with hardware security concepts including key management, physical attack and ...
Senior ASIC Design Verification Engineer
$170K - $250K/yr
The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ... Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ...
Senior ASIC Design Verification Engineer
$170K - $250K/yr
The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ... Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ...
ASIC Package Design Manager
Fort Collins, CO · On-site
$143.80 - $230/hr
Broadcom is seeking an experienced IC Package Design Manager to lead a team of engineers designing ... How the substrate and package fit into the overall ASIC design and manufacturing flows * Design ...
ASIC Package Design Manager
Fort Collins, CO · On-site
$143.80 - $230/hr
Broadcom is seeking an experienced IC Package Design Manager to lead a team of engineers designing ... How the substrate and package fit into the overall ASIC design and manufacturing flows * Design ...
This role demands proven technical expertise in advanced ASIC design flows, and leadership in ... Ability to coordinate across multiple projects, manage risks and escalations, and work under tight ...
This role demands proven technical expertise in advanced ASIC design flows, and leadership in ... Ability to coordinate across multiple projects, manage risks and escalations, and work under tight ...
OR · On-site
$170K - $250K/yr
The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ... Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ...
We have the flexibility to manage our work and personal needs. We make bold moves, together, and ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
We have the flexibility to manage our work and personal needs. We make bold moves, together, and ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
ASIC Engineer, Design Verification
Sunnyvale, CA · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization ... management * Participate in design reviews and verification planning discussions to identify ...
ASIC Engineer, Design Verification
Sunnyvale, CA · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization ... management * Participate in design reviews and verification planning discussions to identify ...
Direct-Hire -- Principal Digital ASIC Design Engineer -- Clearfield, UT (Onsite)
Clearfield, UT · On-site
$126K/yr
Manage a task with multiple engineers and effectively communicate status to project leadership and ... Proficiency in ASIC design, microprocessor programming or embedded computing. * Understanding of ...
Quick apply
Direct-Hire -- Principal Digital ASIC Design Engineer -- Clearfield, UT (Onsite)
Clearfield, UT · On-site
$126K/yr
Manage a task with multiple engineers and effectively communicate status to project leadership and ... Proficiency in ASIC design, microprocessor programming or embedded computing. * Understanding of ...
Work with internal infrastructure team on adapting internal infrastructure to ASIC design solutions, including but not limited to Source Control Management, Continuous Integration, data management ...
Work with internal infrastructure team on adapting internal infrastructure to ASIC design solutions, including but not limited to Source Control Management, Continuous Integration, data management ...
We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
Description As an ASIC Design Engineer in the Pixel IP design team, you be responsible for complex ... manage deliverables to align with the project goals and support cross-functional engineering ...
Description As an ASIC Design Engineer in the Pixel IP design team, you be responsible for complex ... manage deliverables to align with the project goals and support cross-functional engineering ...
You will engage in advanced ASIC design activities, integrating high-speed interfaces and managing comprehensive signoff processes while providing technical mentorship. This full-time role offers ...
You will engage in advanced ASIC design activities, integrating high-speed interfaces and managing comprehensive signoff processes while providing technical mentorship. This full-time role offers ...
ASIC Package Design Manager
San Jose, CA · On-site
Self-management and organization skills * Technical understanding related to package design: * Package-Design lifecycle * How the substrate and package fit into the overall ASIC design and ...
ASIC Package Design Manager
San Jose, CA · On-site
Self-management and organization skills * Technical understanding related to package design: * Package-Design lifecycle * How the substrate and package fit into the overall ASIC design and ...
We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ... Distinguished Technologist, ASIC Design Architect We are seeking an experienced ASIC Design ...
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
ASIC Engineer, Design Verification
Austin, TX · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization ... management * Participate in design reviews and verification planning discussions to identify ...
ASIC Engineer, Design Verification
Austin, TX · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization ... management * Participate in design reviews and verification planning discussions to identify ...
Asic Design Manager information
See salary details
$42K - $56.5K
4% of jobs
$56.5K - $71K
8% of jobs
$81.6K is the 25th percentile. Wages below this are outliers.
$71K - $85.5K
17% of jobs
The median wage is $99K / yr.
$85.5K - $100K
22% of jobs
$100K - $114.5K
15% of jobs
$114.5K - $129K
6% of jobs
$133.7K is the 75th percentile. Wages above this are outliers.
$129K - $143.5K
7% of jobs
$143.5K - $158K
7% of jobs
$158K - $172.5K
8% of jobs
$172.5K - $187K
2% of jobs
$187K - $201.5K
2% of jobs
$42K
$114.5K
$201.5K
How much do asic design manager jobs pay per year?
As of Aug 8, 2026, the average yearly pay for asic design manager in the United States is $114,491.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,500.00 and $144,000.00 per year, depending on experience, location, and employer.
Is ASIC design in demand?
ASIC design is in high demand due to the growth of industries such as consumer electronics, telecommunications, and automotive technology. Skilled ASIC design managers with expertise in hardware description languages and verification tools are sought after to develop custom integrated circuits for various applications.
What is the difference between Asic Design Manager vs Asic Design Engineer?
| Aspect | Asic Design Manager | Asic Design Engineer |
|---|---|---|
| Responsibilities | Oversees ASIC design projects, manages teams, and coordinates with stakeholders | Performs ASIC design, coding, simulation, and verification tasks |
| Required Skills | Leadership, project management, ASIC design knowledge | Hardware description languages, circuit design, verification skills |
| Experience | Typically 8+ years in ASIC design, with leadership experience | Usually 2-5 years in ASIC design roles |
| Work Environment | Design teams, project planning, cross-functional collaboration | Design labs, simulation environments, coding and testing |
The main difference between an Asic Design Manager and an Asic Design Engineer lies in their roles. The manager oversees projects and teams, focusing on leadership and coordination, while the engineer concentrates on technical ASIC design and implementation. Both roles require ASIC design expertise, but the manager's role is more strategic and supervisory.
What are the key skills and qualifications needed to thrive as an ASIC Design Manager?
To thrive as an ASIC Design Manager, you need expertise in digital and analog ASIC design, project management experience, and typically a degree in electrical engineering or a related field. Familiarity with industry-standard EDA tools (such as Cadence or Synopsys), verification methodologies, and knowledge of relevant design flows is crucial. Strong leadership, communication, and problem-solving skills help manage teams and coordinate with cross-functional stakeholders. These competencies ensure high-quality chip designs are delivered on time and meet performance and cost targets, which is vital for organizational success.
Is ASIC design difficult?
ASIC design is a complex process that requires strong knowledge of digital logic, hardware description languages like VHDL or Verilog, and familiarity with electronic design automation tools. It involves multiple stages such as architecture, verification, and testing, making it challenging but manageable with proper training and experience.
What are some common challenges faced by an ASIC Design Manager in leading multidisciplinary teams?
ASIC Design Managers often navigate the complexities of coordinating multidisciplinary teams, including digital, analog, verification, and physical design engineers. One common challenge is ensuring clear communication across these specialties to maintain alignment on project goals, timelines, and technical requirements. Additionally, managing shifting priorities, resolving technical bottlenecks, and balancing resource allocation are frequent hurdles. Successful managers foster collaboration, set clear expectations, and leverage structured project management practices to keep teams productive and motivated.
What does an ASIC Design Manager do?
An ASIC Design Manager oversees the design and development of Application Specific Integrated Circuits (ASICs), managing a team of engineers through the entire chip design process. They coordinate project timelines, ensure technical specifications are met, and facilitate communication between design, verification, and manufacturing teams. Their role also involves resource planning, risk management, and ensuring that the final product meets performance, cost, and quality targets.
More about Asic Design Manager jobs
What cities are hiring for Asic Design Manager jobs? Cities with the most Asic Design Manager job openings:
What are the most commonly searched types of Asic Design jobs? The most popular types of Asic Design jobs are:
What states have the most Asic Design Manager jobs? States with the most job openings for Asic Design Manager jobs include:
What job categories do people searching Asic Design Manager jobs look for? The top searched job categories for Asic Design Manager jobs are:
Full-time
Posted 4 days ago
Apple rating
8.0
Based on 677 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
Apple's Silicon Security team is looking for a driven ASIC Design Engineer to build the secure subsystems that protect the entire Apple SoC. In this role, you will design the state-of-the-art hardware defenses that prevent complex side channel attacks and ensure the integrity of our customers' most sensitive data across Apple's product line. Our work spans cryptographic engines, side channel attack monitors, data protection logics etc that make Apple devices the most secure consumer electronics in the world.
Description
As an ASIC Design Engineer on the Silicon Security team, you will be responsible for the micro-architecture, RTL design and integration of secure subsystems. Your responsibilities will include:
• Architecting and designing state-of-the-art security features, working closely with Platform Architecture, Design Verification to deliver high performance, area and power efficient RTL Blocks on time
• Integrating security IPs into secure subsystem and ensuring timing, performance and security requirements are met.
• Resolving integration issues across multiple IP blocks and coordinating with IP owners on interface and functionality concerns
• Driving front-end quality flows from RTL to netlist, including hands-on work with Lint, CDC/RDC analysis, UPF development, timing, and Synthesis.
• Leveraging AI-assisted tools to enhance design quality and productivity.
Minimum Qualifications
BS in Electrical Engineering, Computer Engineering or a relevant field and 0 years of experience
Preferred Qualifications
RTL design experience using Verilog or SystemVerilog.
Experience with CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing) analysis and verification.
Familiarity with low-power design techniques and UPF (Unified Power Format).
Solid understanding of digital design fundamentals including synthesis, timing closure, and design for testability.
Background in cryptography and cryptographic algorithm implementation.
Experience with hardware security concepts including key management, physical attack and countermeasures.
Experience with clock and reset architecture at the subsystem level
Strong knowledge of AMBA bus protocols (AXI, AHB, APB).
Description
As an ASIC Design Engineer on the Silicon Security team, you will be responsible for the micro-architecture, RTL design and integration of secure subsystems. Your responsibilities will include:
• Architecting and designing state-of-the-art security features, working closely with Platform Architecture, Design Verification to deliver high performance, area and power efficient RTL Blocks on time
• Integrating security IPs into secure subsystem and ensuring timing, performance and security requirements are met.
• Resolving integration issues across multiple IP blocks and coordinating with IP owners on interface and functionality concerns
• Driving front-end quality flows from RTL to netlist, including hands-on work with Lint, CDC/RDC analysis, UPF development, timing, and Synthesis.
• Leveraging AI-assisted tools to enhance design quality and productivity.
Minimum Qualifications
BS in Electrical Engineering, Computer Engineering or a relevant field and 0 years of experience
Preferred Qualifications
RTL design experience using Verilog or SystemVerilog.
Experience with CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing) analysis and verification.
Familiarity with low-power design techniques and UPF (Unified Power Format).
Solid understanding of digital design fundamentals including synthesis, timing closure, and design for testability.
Background in cryptography and cryptographic algorithm implementation.
Experience with hardware security concepts including key management, physical attack and countermeasures.
Experience with clock and reset architecture at the subsystem level
Strong knowledge of AMBA bus protocols (AXI, AHB, APB).
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976