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Asic Design Manager Jobs (NOW HIRING)

Sr. Engineer, ASIC Design

San Jose, CA · On-site

$160 - $192/hr

The ASIC Engineer is responsible for design and integration of complex SoCs with both high-speed ... manage their own time to take projects to completion with limited supervision and guidance. Key ...

ASIC designer

Waukesha, WI · On-site

$40 - $50/hr

The successful candidate will interface with ASIC simulation & design teams, and Hardware Subsystem ... Working knowledge of project management processes and procedures. * Experience with typical related ...

ASIC Engineer

San Jose, CA · On-site

$194K/yr

With over 20 man years of contingent staffing experience, the management & execution team is ... ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal ...

Sr. Staff Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data ... manage his or her own time to take projects to completion with limited supervision and guidance.

Sr. Staff Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data ... manage his or her own time to take projects to completion with limited supervision and guidance.

ASIC Package Design Manager

San Jose, CA · On-site

$143.80 - $230/hr

Broadcom is seeking an experienced IC Package Design Manager to lead a team of engineers designing ... Technical knowledge of package design lifecycle, substrate and package integration into ASIC design ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...

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Asic Design Manager information

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$42K

$114.5K

$201.5K

How much do asic design manager jobs pay per year?

As of Aug 8, 2026, the average yearly pay for asic design manager in the United States is $114,491.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,500.00 and $144,000.00 per year, depending on experience, location, and employer.

Is ASIC design in demand?

ASIC design is in high demand due to the growth of industries such as consumer electronics, telecommunications, and automotive technology. Skilled ASIC design managers with expertise in hardware description languages and verification tools are sought after to develop custom integrated circuits for various applications.

What is the difference between Asic Design Manager vs Asic Design Engineer?

AspectAsic Design ManagerAsic Design Engineer
ResponsibilitiesOversees ASIC design projects, manages teams, and coordinates with stakeholdersPerforms ASIC design, coding, simulation, and verification tasks
Required SkillsLeadership, project management, ASIC design knowledgeHardware description languages, circuit design, verification skills
ExperienceTypically 8+ years in ASIC design, with leadership experienceUsually 2-5 years in ASIC design roles
Work EnvironmentDesign teams, project planning, cross-functional collaborationDesign labs, simulation environments, coding and testing

The main difference between an Asic Design Manager and an Asic Design Engineer lies in their roles. The manager oversees projects and teams, focusing on leadership and coordination, while the engineer concentrates on technical ASIC design and implementation. Both roles require ASIC design expertise, but the manager's role is more strategic and supervisory.

What are the key skills and qualifications needed to thrive as an ASIC Design Manager?

To thrive as an ASIC Design Manager, you need expertise in digital and analog ASIC design, project management experience, and typically a degree in electrical engineering or a related field. Familiarity with industry-standard EDA tools (such as Cadence or Synopsys), verification methodologies, and knowledge of relevant design flows is crucial. Strong leadership, communication, and problem-solving skills help manage teams and coordinate with cross-functional stakeholders. These competencies ensure high-quality chip designs are delivered on time and meet performance and cost targets, which is vital for organizational success.

Is ASIC design difficult?

ASIC design is a complex process that requires strong knowledge of digital logic, hardware description languages like VHDL or Verilog, and familiarity with electronic design automation tools. It involves multiple stages such as architecture, verification, and testing, making it challenging but manageable with proper training and experience.

What are some common challenges faced by an ASIC Design Manager in leading multidisciplinary teams?

ASIC Design Managers often navigate the complexities of coordinating multidisciplinary teams, including digital, analog, verification, and physical design engineers. One common challenge is ensuring clear communication across these specialties to maintain alignment on project goals, timelines, and technical requirements. Additionally, managing shifting priorities, resolving technical bottlenecks, and balancing resource allocation are frequent hurdles. Successful managers foster collaboration, set clear expectations, and leverage structured project management practices to keep teams productive and motivated.

What does an ASIC Design Manager do?

An ASIC Design Manager oversees the design and development of Application Specific Integrated Circuits (ASICs), managing a team of engineers through the entire chip design process. They coordinate project timelines, ensure technical specifications are met, and facilitate communication between design, verification, and manufacturing teams. Their role also involves resource planning, risk management, and ensuring that the final product meets performance, cost, and quality targets.
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What cities are hiring for Asic Design Manager jobs? Cities with the most Asic Design Manager job openings:
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Infographic showing various Asic Design Manager job openings in the United States as of August 2026, with employment types broken down into 88% Full Time, 11% Part Time, and 1% Contract. Highlights an 85% Physical, 2% Hybrid, and 13% Remote job distribution, with an average salary of $114,491 per year, or $55 per hour.

Sr. Engineer, ASIC Design

Ayar Labs

San Jose, CA • On-site

$160 - $192/hr

Other

Re-posted 18 days ago


Job description

The ASIC Engineer is responsible for design and integration of complex SoCs with both high-speed custom and digital blocks. You will work in a dynamic startup environment as part of a small IC design team, covering roles from custom circuit design to optical device design. Each team member is expected to contribute across a broad range of tasks and to gain new skill sets to grow with the company. The ideal candidate is a hands‑on self‑starter who can craft specifications based on input from colleagues, customers, and industry and who can effectively manage their own time to take projects to completion with limited supervision and guidance.

Key Responsibilities
  • Develop and optimize RTL designs for use in complex digital systems
  • Develop verification methodology and testbenches for digital and mixed-signal blocks
  • Bringup, evaluation, and debug of in-house custom silicon using Python scripting, firmware, and control systems
  • Create clear documentation of designs to enable backend ASIC engineers to perform physical implementation (clocks and timing constraints, floorplan guidance, testability) and collaborate to ensure timing signoff
Required Skills
  • BS or MS in Electrical Engineering, Computer Engineering, or related fields
  • 1+ years of work or academic experience in ASIC design
  • History of assuming responsibility for a variety of technical tasks and completing projects independently
  • Proficient in Verilog for both RTL design and verification
  • Proficient in ASIC verification (XCelium, VCS, Questa) tools
  • Proficient in scripting or programming languages
Preferred Skills
  • Proficient in writing timing constraints and deep understanding of timing analysis
  • Experience working on digital designs with multiple clock domains and clock dividers
  • Working knowledge integrating custom blocks in a digital-top flow (LEF, lib, etc.)
  • Performed silicon bring-up, debug, and evaluation
  • Programming experience in Python, low-level languages (C, C++)
  • Some knowledge of optics and control systems

Salary Range: $160,000 - $192,000

Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.

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