Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
$170K - $250K/yr
The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ... Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ...
$130K - $200K/yr
The Role We are seeking an ASIC Design Verification Engineer whose role will be to verify the ... Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ...
$190K - $285K/yr
The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ... Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... Self-driven and results-oriented with ability to manage multiple tasks effectively * Strong ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... Self-driven and results-oriented with ability to manage multiple tasks effectively * Strong ...
$200K - $280K/yr
The Role We are seeking a Principal ASIC Package Design Engineer to lead advanced ASIC package ... management for power-dense ASICs. * Fluent in SI/PI and EM simulation tools such as SIWave, HFSS ...
ASIC Physical Design Principal Consultant
$148K - $152K/yr
At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist ... Experience with project management. * Experience and desire to work in a management consulting ...
ASIC Physical Design Principal Consultant
$148K - $152K/yr
At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist ... Experience with project management. * Experience and desire to work in a management consulting ...
$180K - $260K/yr
The Role We are seeking a Senior ASIC Package Design Engineer to implement advanced ASIC package ... management for power-dense ASICs. * Fluent in SI/PI and EM simulation tools such as SIWave, HFSS ...
Senior ASIC (Front-End) Design Engineer
OR · Remote
$200K - $300K/yr
Senior ASIC Front-End Design Engineer Summary: * As a Senior ASIC Front-End Design Engineer, you ... management, and software interfaces. * You will be a trusted self-starter who can work with very ...
Senior ASIC (Front-End) Design Engineer
OR · Remote
$200K - $300K/yr
Senior ASIC Front-End Design Engineer Summary: * As a Senior ASIC Front-End Design Engineer, you ... management, and software interfaces. * You will be a trusted self-starter who can work with very ...
Sr. Digital ASIC Engineer
$91K - $177K/yr
... of management, and the freedom to make meaningful contributions in a setting that encourages ... Responsibilities You will architect, design and collaborate on radio subsystems in small geometry ...
Sr. Digital ASIC Engineer
$91K - $177K/yr
... of management, and the freedom to make meaningful contributions in a setting that encourages ... Responsibilities You will architect, design and collaborate on radio subsystems in small geometry ...
Sr. Digital ASIC Engineer
Hillsboro, OR · On-site
$91K - $177K/yr
... of management, and the freedom to make meaningful contributions in a setting that encourages ... Responsibilities You will architect, design and collaborate on radio subsystems in small geometry ...
Sr. Digital ASIC Engineer
Hillsboro, OR · On-site
$91K - $177K/yr
... of management, and the freedom to make meaningful contributions in a setting that encourages ... Responsibilities You will architect, design and collaborate on radio subsystems in small geometry ...
$170K - $250K/yr
The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that ... Familiarity with physical design service vendor management or offshore collaboration. * Experience ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... constraints generation and management, proficient in scripting languages (Tcl and Perl ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... constraints generation and management, proficient in scripting languages (Tcl and Perl ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... constraints generation and management, proficient in scripting languages (Tcl and Perl ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... constraints generation and management, proficient in scripting languages (Tcl and Perl ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Asic Design Manager information
See Oregon salary details
$44.4K - $59.7K
4% of jobs
$59.7K - $75.1K
8% of jobs
$86.3K is the 25th percentile. Wages below this are outliers.
$75.1K - $90.4K
17% of jobs
The median wage is $104.6K / yr.
$90.4K - $105.7K
22% of jobs
$105.7K - $121.1K
15% of jobs
$121.1K - $136.4K
6% of jobs
$141.3K is the 75th percentile. Wages above this are outliers.
$136.4K - $151.7K
7% of jobs
$151.7K - $167.1K
7% of jobs
$167.1K - $182.4K
8% of jobs
$182.4K - $197.7K
2% of jobs
$197.7K - $213K
2% of jobs
$44.4K
$121K
$213K
How much do asic design manager jobs pay per year?
As of Jul 16, 2026, the average yearly pay for asic design manager in Oregon is $121,050.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,300.00 and $152,200.00 per year, depending on experience, location, and employer.
What is the difference between Asic Design Manager vs Asic Design Engineer?
| Aspect | Asic Design Manager | Asic Design Engineer |
|---|---|---|
| Responsibilities | Oversees ASIC design projects, manages teams, and coordinates with stakeholders | Performs ASIC design, coding, simulation, and verification tasks |
| Required Skills | Leadership, project management, ASIC design knowledge | Hardware description languages, circuit design, verification skills |
| Experience | Typically 8+ years in ASIC design, with leadership experience | Usually 2-5 years in ASIC design roles |
| Work Environment | Design teams, project planning, cross-functional collaboration | Design labs, simulation environments, coding and testing |
The main difference between an Asic Design Manager and an Asic Design Engineer lies in their roles. The manager oversees projects and teams, focusing on leadership and coordination, while the engineer concentrates on technical ASIC design and implementation. Both roles require ASIC design expertise, but the manager's role is more strategic and supervisory.
What are the key skills and qualifications needed to thrive as an ASIC Design Manager, and why are they important?
To thrive as an ASIC Design Manager, you need expertise in digital and analog ASIC design, project management experience, and typically a degree in electrical engineering or a related field. Familiarity with industry-standard EDA tools (such as Cadence or Synopsys), verification methodologies, and knowledge of relevant design flows is crucial. Strong leadership, communication, and problem-solving skills help manage teams and coordinate with cross-functional stakeholders. These competencies ensure high-quality chip designs are delivered on time and meet performance and cost targets, which is vital for organizational success.
What are some common challenges faced by an ASIC Design Manager in leading multidisciplinary teams?
ASIC Design Managers often navigate the complexities of coordinating multidisciplinary teams, including digital, analog, verification, and physical design engineers. One common challenge is ensuring clear communication across these specialties to maintain alignment on project goals, timelines, and technical requirements. Additionally, managing shifting priorities, resolving technical bottlenecks, and balancing resource allocation are frequent hurdles. Successful managers foster collaboration, set clear expectations, and leverage structured project management practices to keep teams productive and motivated.
What does an ASIC Design Manager do?
An ASIC Design Manager oversees the design and development of Application Specific Integrated Circuits (ASICs), managing a team of engineers through the entire chip design process. They coordinate project timelines, ensure technical specifications are met, and facilitate communication between design, verification, and manufacturing teams. Their role also involves resource planning, risk management, and ensuring that the final product meets performance, cost, and quality targets.
What are popular job titles related to Asic Design Manager jobs in Oregon? For Asic Design Manager jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Asic Design Manager jobs in Oregon look for? The top searched job categories for Asic Design Manager jobs in Oregon are:
What cities in Oregon are hiring for Asic Design Manager jobs? Cities in Oregon with the most Asic Design Manager job openings:
Apple rating
8.1
Based on 670 frontline employees who took The Breakroom Quiz
5th of 30 rated technology retailers
Job description
Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next excellent Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our complex group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a dedicated engineer to join our exciting team of problem solvers.
Description
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:
- Write microarchitecture and/or design specifications
- Design, implement, and debug complex logic designs
- Integrate complex IPs into the SOC
- Support all front end integration activities like Lint, CDC, Synthesis, and ECO
- Work with other specialists that are members of the SOC Design, SOC Design
- Verification, Emulation, STA, and Physical Design teams
- Collaborate with software and systems teams to ensure a high quality
Preferred Qualifications
Experience writing specifications and converting them to design.
Experience with multiple clock domains and asynchronous interfaces.
Hands on experience in all aspects of the chip development process with proficiency in front end tools and methodologies
Experience or knowledge of system architecture, CPU & IP Integration, and power and clock management designs desirable.
Ability to communicate optimally across all internal groups
Familiarity with software and operating concepts a plus
Familiarity with scripting languages like Perl, Python, or TCL a plus
Minimum Qualifications
BS and a minimum of 3 years relevant industry experience.
Verilog RTL Logic Design experience.
Description
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:
- Write microarchitecture and/or design specifications
- Design, implement, and debug complex logic designs
- Integrate complex IPs into the SOC
- Support all front end integration activities like Lint, CDC, Synthesis, and ECO
- Work with other specialists that are members of the SOC Design, SOC Design
- Verification, Emulation, STA, and Physical Design teams
- Collaborate with software and systems teams to ensure a high quality
Preferred Qualifications
Experience writing specifications and converting them to design.
Experience with multiple clock domains and asynchronous interfaces.
Hands on experience in all aspects of the chip development process with proficiency in front end tools and methodologies
Experience or knowledge of system architecture, CPU & IP Integration, and power and clock management designs desirable.
Ability to communicate optimally across all internal groups
Familiarity with software and operating concepts a plus
Familiarity with scripting languages like Perl, Python, or TCL a plus
Minimum Qualifications
BS and a minimum of 3 years relevant industry experience.
Verilog RTL Logic Design experience.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976