Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
OR · On-site
$170K - $250K/yr
The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ... Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ...
OR · On-site
$190K - $285K/yr
The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify ... Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... Self-driven and results-oriented with ability to manage multiple tasks effectively * Strong ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... Self-driven and results-oriented with ability to manage multiple tasks effectively * Strong ...
... management system with complex build requirements. Our approach delivers the performance required ... As a Senior Design Engineer at NVIDIA, you will be responsible for the development and micro ...
... management system with complex build requirements. Our approach delivers the performance required ... As a Senior Design Engineer at NVIDIA, you will be responsible for the development and micro ...
ASIC Physical Design Principal Consultant
Hillsboro, OR · On-site
$148K - $152K/yr
At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist ... Experience with project management. * Experience and desire to work in a management consulting ...
ASIC Physical Design Principal Consultant
Hillsboro, OR · On-site
$148K - $152K/yr
At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist ... Experience with project management. * Experience and desire to work in a management consulting ...
OR · On-site
$180K - $260K/yr
The Role We are seeking a Senior ASIC Package Design Engineer to implement advanced ASIC package ... management for power-dense ASICs. * Fluent in SI/PI and EM simulation tools such as SIWave, HFSS ...
$170K - $250K/yr
The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that ... Familiarity with physical design service vendor management or offshore collaboration. * Experience ...
OR · On-site
$170K - $250K/yr
You will work closely with architecture, RTL design, DFT, DV, firmware, physical design, and ... Manage interactions with external IP providers or emulation partners when needed. Qualifications
New
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... constraints generation and management, proficient in scripting languages (Tcl and Perl ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... constraints generation and management, proficient in scripting languages (Tcl and Perl ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Timing Design Engineer
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
SoC Design and Verification
Hillsboro, OR · On-site
$148K - $180K/yr
Knowledge of ASIC design methodologies and flows. * Ability to Manage and conduct training for the team. * Worked with companies and seen at least a couple of tape-outs * Project management ...
SoC Design and Verification
Hillsboro, OR · On-site
$148K - $180K/yr
Knowledge of ASIC design methodologies and flows. * Ability to Manage and conduct training for the team. * Worked with companies and seen at least a couple of tape-outs * Project management ...
SoC Design and Verification
Hillsboro, OR · On-site
$148K - $180K/yr
Knowledge of ASIC design methodologies and flows * Ability to Manage and conduct training for the team * Worked with companies and seen at least a couple of tape-outs * Project management ...
SoC Design and Verification
Hillsboro, OR · On-site
$148K - $180K/yr
Knowledge of ASIC design methodologies and flows * Ability to Manage and conduct training for the team * Worked with companies and seen at least a couple of tape-outs * Project management ...
Design and build automation to scale GPU development processes across hardware models, testbenches ... Familiarity with GPU or ASIC development processes * Experience with configuration management for ...
Design and build automation to scale GPU development processes across hardware models, testbenches ... Familiarity with GPU or ASIC development processes * Experience with configuration management for ...
$190K - $280K/yr
This role also involves managing external physical design partners, driving tool and flow decisions ... years of experience in ASIC physical design for high-performance SoCs. * Proven end-to-end ...
Design and build automation to scale GPU development processes across hardware models, testbenches ... Familiarity with GPU or ASIC development processes * Experience with configuration management for ...
Asic Design Manager information
See Oregon salary details
$44.4K - $59.7K
4% of jobs
$59.7K - $75.1K
8% of jobs
$86.3K is the 25th percentile. Wages below this are outliers.
$75.1K - $90.4K
17% of jobs
The median wage is $104.6K / yr.
$90.4K - $105.7K
22% of jobs
$105.7K - $121.1K
15% of jobs
$121.1K - $136.4K
6% of jobs
$141.3K is the 75th percentile. Wages above this are outliers.
$136.4K - $151.7K
7% of jobs
$151.7K - $167.1K
7% of jobs
$167.1K - $182.4K
8% of jobs
$182.4K - $197.7K
2% of jobs
$197.7K - $213K
2% of jobs
$44.4K
$121K
$213K
How much do asic design manager jobs pay per year?
Is ASIC design in demand?
What is the difference between Asic Design Manager vs Asic Design Engineer?
| Aspect | Asic Design Manager | Asic Design Engineer |
|---|---|---|
| Responsibilities | Oversees ASIC design projects, manages teams, and coordinates with stakeholders | Performs ASIC design, coding, simulation, and verification tasks |
| Required Skills | Leadership, project management, ASIC design knowledge | Hardware description languages, circuit design, verification skills |
| Experience | Typically 8+ years in ASIC design, with leadership experience | Usually 2-5 years in ASIC design roles |
| Work Environment | Design teams, project planning, cross-functional collaboration | Design labs, simulation environments, coding and testing |
The main difference between an Asic Design Manager and an Asic Design Engineer lies in their roles. The manager oversees projects and teams, focusing on leadership and coordination, while the engineer concentrates on technical ASIC design and implementation. Both roles require ASIC design expertise, but the manager's role is more strategic and supervisory.
What are the key skills and qualifications needed to thrive as an ASIC Design Manager?
Is ASIC design difficult?
What are some common challenges faced by an ASIC Design Manager in leading multidisciplinary teams?
What does an ASIC Design Manager do?

Apple rating
8.0
Based on 677 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
Description
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:
- Write microarchitecture and/or design specifications
- Design, implement, and debug complex logic designs
- Integrate complex IPs into the SOC
- Support all front end integration activities like Lint, CDC, Synthesis, and ECO
- Work with other specialists that are members of the SOC Design, SOC Design
- Verification, Emulation, STA, and Physical Design teams
- Collaborate with software and systems teams to ensure a high quality
Preferred Qualifications
Experience writing specifications and converting them to design.
Experience with multiple clock domains and asynchronous interfaces.
Hands on experience in all aspects of the chip development process with proficiency in front end tools and methodologies
Experience or knowledge of system architecture, CPU & IP Integration, and power and clock management designs desirable.
Ability to communicate optimally across all internal groups
Familiarity with software and operating concepts a plus
Familiarity with scripting languages like Perl, Python, or TCL a plus
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience.
Verilog RTL Logic Design experience.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976