Senior ASIC Design Engineer
$116K - $182K/yr
Senior ASIC Design Engineer Description - HP is the world's leading printing company. We are ... Manage and expand relationships with internal and external development partners. * Be a key ...
$116K - $182K/yr
Senior ASIC Design Engineer Description - HP is the world's leading printing company. We are ... Manage and expand relationships with internal and external development partners. * Be a key ...
$116K - $182K/yr
Senior ASIC Design Engineer Description - HP is the world's leading printing company. We are ... Manage and expand relationships with internal and external development partners. * Be a key ...
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... management designs desirable. Ability to communicate optimally across all internal groups ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... Self-driven and results-oriented with ability to manage multiple tasks effectively * Strong ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... Self-driven and results-oriented with ability to manage multiple tasks effectively * Strong ...
... management system with complex build requirements. Our approach delivers the performance required ... As a Senior Design Engineer at NVIDIA, you will be responsible for the development and micro ...
... management system with complex build requirements. Our approach delivers the performance required ... As a Senior Design Engineer at NVIDIA, you will be responsible for the development and micro ...
$148K - $152K/yr
At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist ... Experience with project management. * Experience and desire to work in a management consulting ...
$148K - $152K/yr
At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist ... Experience with project management. * Experience and desire to work in a management consulting ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... constraints generation and management, proficient in scripting languages (Tcl and Perl ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... constraints generation and management, proficient in scripting languages (Tcl and Perl ...
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Beaverton, OR · On-site
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... Hands on experience in timing/SDC constraints generation and management. Proficient in scripting ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... design & implementation with focus on Memory Management unit, define the verification scope ...
$148K - $180K/yr
Knowledge of ASIC design methodologies and flows. * Ability to Manage and conduct training for the team. * Worked with companies and seen at least a couple of tape-outs * Project management ...
$148K - $180K/yr
Knowledge of ASIC design methodologies and flows. * Ability to Manage and conduct training for the team. * Worked with companies and seen at least a couple of tape-outs * Project management ...
$148K - $180K/yr
Knowledge of ASIC design methodologies and flows * Ability to Manage and conduct training for the team * Worked with companies and seen at least a couple of tape-outs * Project management ...
$148K - $180K/yr
Knowledge of ASIC design methodologies and flows * Ability to Manage and conduct training for the team * Worked with companies and seen at least a couple of tape-outs * Project management ...
Design and build automation to scale GPU development processes across hardware models, testbenches ... Familiarity with GPU or ASIC development processes * Experience with configuration management for ...
Design and build automation to scale GPU development processes across hardware models, testbenches ... Familiarity with GPU or ASIC development processes * Experience with configuration management for ...
Self-driven and results-oriented with ability to manage multiple complex tasks effectively ... Hands-on experience in Design Implementation and methodology (ASIC design, Fullchip Integration ...
Self-driven and results-oriented with ability to manage multiple complex tasks effectively ... Hands-on experience in Design Implementation and methodology (ASIC design, Fullchip Integration ...
Proven success managing long-cycle, highly technical, multi-stakeholder sales pursuits. * Strong ... Extensive network across the ASIC and broader semiconductor ecosystem, including IC design firms ...
Proven success managing long-cycle, highly technical, multi-stakeholder sales pursuits. * Strong ... Extensive network across the ASIC and broader semiconductor ecosystem, including IC design firms ...
Hillsboro, OR · Hybrid
$106K - $198K/yr
Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently * Solid communication and project management skills * 5+ years of logic design experience * BSEE ...
Hillsboro, OR · Hybrid
$106K - $198K/yr
Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently * Solid communication and project management skills * 5+ years of logic design experience * BSEE ...
Hillsboro, OR · Hybrid
$106K - $198K/yr
Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently * Solid communication and project management skills * 5+ years of logic design experience * BSEE ...
Hillsboro, OR · Hybrid
$106K - $198K/yr
Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently * Solid communication and project management skills * 5+ years of logic design experience * BSEE ...
Hillsboro, OR · On-site
$106K - $198K/yr
Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently * Solid communication and project management skills * 5+ years of logic design experience * BSEE ...
Hillsboro, OR · On-site
$106K - $198K/yr
Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently * Solid communication and project management skills * 5+ years of logic design experience * BSEE ...
Hillsboro, OR · Hybrid
$127K - $236K/yr
Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus: * ASIC ...
Hillsboro, OR · Hybrid
$127K - $236K/yr
Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus: * ASIC ...
$44.5K - $59.9K
4% of jobs
$59.9K - $75.3K
8% of jobs
$86.6K is the 25th percentile. Wages below this are outliers.
$75.3K - $90.7K
17% of jobs
The median wage is $105K / yr.
$90.7K - $106.1K
22% of jobs
$106.1K - $121.4K
15% of jobs
$121.4K - $136.8K
6% of jobs
$141.7K is the 75th percentile. Wages above this are outliers.
$136.8K - $152.2K
7% of jobs
$152.2K - $167.6K
7% of jobs
$167.6K - $182.9K
8% of jobs
$182.9K - $198.3K
2% of jobs
$198.3K - $213.7K
2% of jobs
$44.5K
$121.4K
$213.7K
| Aspect | Asic Design Manager | Asic Design Engineer |
|---|---|---|
| Responsibilities | Oversees ASIC design projects, manages teams, and coordinates with stakeholders | Performs ASIC design, coding, simulation, and verification tasks |
| Required Skills | Leadership, project management, ASIC design knowledge | Hardware description languages, circuit design, verification skills |
| Experience | Typically 8+ years in ASIC design, with leadership experience | Usually 2-5 years in ASIC design roles |
| Work Environment | Design teams, project planning, cross-functional collaboration | Design labs, simulation environments, coding and testing |
The main difference between an Asic Design Manager and an Asic Design Engineer lies in their roles. The manager oversees projects and teams, focusing on leadership and coordination, while the engineer concentrates on technical ASIC design and implementation. Both roles require ASIC design expertise, but the manager's role is more strategic and supervisory.

$116K - $182K/yr
Full-time
Medical, Dental, Vision, Life, PTO
Posted 9 days ago
7.8
Based on 45 frontline employees who took The Breakroom Quiz
68th of 156 rated electronics manufacturers
Description -
HP is the world's leading printing company. We are looking for innovators who are ready to make a purposeful impact. You will be a member of the R&D digital Application-Specific Integrated Circuit (ASIC) design team that develops the main controller with critical HP proprietary intellectual property that separates HP printers from the rest of the competitions.You will work with internal and external partners to deliver industry-leading embedded solutions for future HP printers.
Our new Vancouver, Washington site expands HP's presence in the Pacific Northwest and serves as a hub for engineering innovation and product development. This location brings together talented engineers working on next-generation technologies that power HP's industry-leading print and imaging solutions. As part of our Imaging & Print organization, you'll help develop advanced imaging capabilities that enhance performance, quality, and customer experiences across HP's enterprise product portfolio.
Responsibilities:
Lead functional blocks and/or subsystems of digital ASICs from design to silicon verification. This includes RTL coding, verification, silicon validation, and qualification.
Proactively work with other team members and partners to align on specifications, drive reviews, and complete documentation.
Manage and expand relationships with internal and external development partners.
Be a key contributor to ASIC roadmaps and future innovation.
Lead cross-discipline task force to triage product HW & FW integration issues to deliver robust solutions.
Contribute to key areas of Inkjet and Laserjet print architecture and data path requirements.
Be a key contributor to co-development activities to help prototype ASIC designs in FPGA or other software models to support pre-silicon firmware development and verification.
Drive design methodology and tool automation work as needed.
Education and Experience Required:
BS or MS degree in electrical engineering or equivalent with focus on VLSI design experience
8 -10 years of ASIC or SOC design and development experience
Knowledge and Skills:
Deep knowledge of submicron semiconductor technology.
Deep knowledge of embedded system design, verification, and product development lifecycle.
Very familiar with digital ASIC/SOC design flow from RTL to silicon characterization
Very familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc.
Very familiar with design and programming languages: Verilog, SV, Python, Perl, C, C++, etc.
Very familiar with code base management method including subversion, git, GitHub, etc.
Excellent analytical and problem-solving skills.
Excellent written and verbal communication skills, ability to negotiate design features and options
Working knowledge of electronic components, PCA designs and use of test equipment
Deep knowledge and domain know-hows in one or more areas below is a big plus.
Laserjet printing technology
ARM microprocessor subsystem
Memory and storage subsystem (DDR, Flash, eMMC, etc.)
Design database management, scripting and other design flow automation
Proficiency in applying AI Copilot (LLM-based tools) to accelerate ASIC design, verification, and engineering productivity.
The pay range for this role is$116,150to$182,400USD annually with additional opportunities for pay in the form of bonus and/or equity (applies to United States of America candidates only). Pay varies by work location, job-related knowledge, skills, and experience.
Benefits:
HP offers a comprehensive benefits package for this position, including:
Health insurance
Dental insurance
Vision insurance
Long term/short term disability insurance
Employee assistance program
Flexible spending account
Life insurance
Generous time off policies, including;
4-12 weeks fully paid parental leave based on tenure
11 paid holidays
Additional flexible paid vacation and sick leave (US benefits overview)
The compensation and benefits information is accurate as of the date of this posting. The Company reserves the right to modify this information at any time, with or without notice, subject to applicable law.
Job -
EngineeringSchedule -
Full timeShift -
No shift premium (United States of America)Travel -
NoRelocation -
YesEqual Opportunity Employer (EEO) -
HP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s).
Please be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence.
For more information, review HP'sEEO Policy or read about your rights as an applicant under the law here: "Know Your Rights: Workplace Discrimination is Illegal"
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HP is a technology company that operates in more than 170 countries around the world united in creating technology that makes life better for everyone, everywhere. From the boardroom to factory floor, we create a culture where everyone is respected and where people can be themselves, while being a part of something bigger than themselves. We celebrate the notion that you can belong at HP and bring your authentic self to work each and every day. When you do that, you're more innovative and that helps grow our bottom line. Our history: HP's commitment to diversity, equity and inclusion - it's just who we are. From the boardroom to factory floor, we create a culture where everyone is respected and where people can be themselves, while being a part of something bigger than themselves. We celebrate the notion that you can belong at HP and bring your authentic self to work each and every day. When you do that, you're more innovative and that helps grow our bottom line.
It services
10,000+ Employees
Palo Alto, CA, US
1939