1

Asic Design Manager Jobs in Portland, OR (NOW HIRING)

Hardware Design Engineer

Hillsboro, OR ยท On-site

$106K - $198K/yr

Significant ASIC and/or FPGA design experience * Ability to learn quickly and work independently * Solid communication and project management skills * 5+ years of logic design experience * BSEE ...

Principal Logic Design Engineer

Hillsboro, OR ยท Hybrid

$127K - $236K/yr

Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus: * ASIC ...

Principal Logic Design Engineer

Hillsboro, OR ยท Hybrid

$127K - $236K/yr

Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus: * ASIC ...

Principal Logic Design Engineer

Hillsboro, OR ยท On-site

$127.40 - $236.60/hr

Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus * ASIC ...

Principal Logic Design Engineer

Hillsboro, OR ยท On-site

$127K - $236K/yr

Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus: * ASIC ...

Principal Logic Design Engineer

Hillsboro, OR ยท On-site

$127K - $236K/yr

Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus: * ASIC ...

Principal Logic Design Engineer

Hillsboro, OR ยท Hybrid

$127K - $236K/yr

Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus: * ASIC ...

Principal Logic Design Engineer

Hillsboro, OR ยท Hybrid

$127K - $236K/yr

Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA) with BSEE, or * 8+ years of logic design experience (ASIC/FPGA) with MSEE Definite Plus: * ASIC ...

... generation and management. * Expertise in analysis and fixing of timing paths through ECOs ... Experience in physical design and optimization e.g., synthesis, placement, routing, logic ...

Director, SoC Design Engineering

Hillsboro, OR ยท On-site

$148K - $180K/yr

... management experience - Expertise in SystemVerilog and UVM/OVM verification methodologies ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...

Knowledge of Power Delivery and Power Management systems * Solid understanding of analog/mixed ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...

Showing results 21-40

Asic Design Manager information

See Portland, OR salary details

$44.5K

$121.4K

$213.7K

How much do asic design manager jobs pay per year?

As of Aug 13, 2026, the average yearly pay for asic design manager in Portland, OR is $121,418.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,600.00 and $152,700.00 per year, depending on experience, location, and employer.

Is ASIC design in demand?

ASIC design is in high demand due to the growth of industries such as consumer electronics, telecommunications, and automotive technology. Skilled ASIC design managers with expertise in hardware description languages and verification tools are sought after to develop custom integrated circuits for various applications.

What is the difference between Asic Design Manager vs Asic Design Engineer?

AspectAsic Design ManagerAsic Design Engineer
ResponsibilitiesOversees ASIC design projects, manages teams, and coordinates with stakeholdersPerforms ASIC design, coding, simulation, and verification tasks
Required SkillsLeadership, project management, ASIC design knowledgeHardware description languages, circuit design, verification skills
ExperienceTypically 8+ years in ASIC design, with leadership experienceUsually 2-5 years in ASIC design roles
Work EnvironmentDesign teams, project planning, cross-functional collaborationDesign labs, simulation environments, coding and testing

The main difference between an Asic Design Manager and an Asic Design Engineer lies in their roles. The manager oversees projects and teams, focusing on leadership and coordination, while the engineer concentrates on technical ASIC design and implementation. Both roles require ASIC design expertise, but the manager's role is more strategic and supervisory.

What are the key skills and qualifications needed to thrive as an ASIC Design Manager?

To thrive as an ASIC Design Manager, you need expertise in digital and analog ASIC design, project management experience, and typically a degree in electrical engineering or a related field. Familiarity with industry-standard EDA tools (such as Cadence or Synopsys), verification methodologies, and knowledge of relevant design flows is crucial. Strong leadership, communication, and problem-solving skills help manage teams and coordinate with cross-functional stakeholders. These competencies ensure high-quality chip designs are delivered on time and meet performance and cost targets, which is vital for organizational success.

Is ASIC design difficult?

ASIC design is a complex process that requires strong knowledge of digital logic, hardware description languages like VHDL or Verilog, and familiarity with electronic design automation tools. It involves multiple stages such as architecture, verification, and testing, making it challenging but manageable with proper training and experience.

What are some common challenges faced by an ASIC Design Manager in leading multidisciplinary teams?

ASIC Design Managers often navigate the complexities of coordinating multidisciplinary teams, including digital, analog, verification, and physical design engineers. One common challenge is ensuring clear communication across these specialties to maintain alignment on project goals, timelines, and technical requirements. Additionally, managing shifting priorities, resolving technical bottlenecks, and balancing resource allocation are frequent hurdles. Successful managers foster collaboration, set clear expectations, and leverage structured project management practices to keep teams productive and motivated.

What does an ASIC Design Manager do?

An ASIC Design Manager oversees the design and development of Application Specific Integrated Circuits (ASICs), managing a team of engineers through the entire chip design process. They coordinate project timelines, ensure technical specifications are met, and facilitate communication between design, verification, and manufacturing teams. Their role also involves resource planning, risk management, and ensuring that the final product meets performance, cost, and quality targets.

What are popular job titles related to Asic Design Manager jobs in Portland, OR?

For Asic Design Manager jobs in Portland, OR, the most frequently searched job titles are:

What job categories do people searching Asic Design Manager jobs in Portland, OR look for?

The top searched job categories for Asic Design Manager jobs in Portland, OR are:

What cities near Portland, OR are hiring for Asic Design Manager jobs?

Cities near Portland, OR with the most Asic Design Manager job openings:

Infographic showing various Asic Design Manager job openings in Portland, OR as of August 2026, with employment types broken down into 85% Full Time, 14% Part Time, and 1% Contract. Highlights an 84% Physical, 3% Hybrid, and 13% Remote job distribution, with an average salary of $121,418 per year, or $58.4 per hour.

Hardware Design Engineer

Rambus

Hillsboro, OR โ€ข On-site

$106K - $198K/yr

Other

Medical, Dental, Retirement

Re-posted 23 days ago


Job description

Overview
Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional HW Design Engineer to join our MCG team in Hillsboro. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.
Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.
Responsibilities
  • Design architecting and trade-off analysis
  • RTL coding and verification
  • Memory Controller + PHY integration and verification
  • Customer delivery and support

Qualifications
Strong System Verilog/Verilog RTL design expertise
  • Questa/Incisive/VCS simulator experience
  • Python/Perl/Tcl scripting experience
  • Significant ASIC and/or FPGA design experience
  • Ability to learn quickly and work independently
  • Solid communication and project management skills
  • 5+ years of logic design experience
  • BSEE

Definite Plus:
  • ASIC synthesis, timing constraint, CDC/RDC experience
  • Verification experience
  • Memory (HBM, GDDR, LPDDR, DDR) expertise
  • AMBA AXI or CHI design experience
  • Located in the Hillsboro, Oregon area

Training:
  • Provided as needed

About Rambus
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems.
Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.
The US salary range for this full-time position is $106,900 to $198,500. Our salary ranges are determined by role, level and location. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.
For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.
#LI-HYBRID
#LI-RF1