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Asic Design Jobs in California (NOW HIRING)

Qualcomm

ASIC Design Engineer

Santa Clara, CA · On-site

$126.70 - $190.10/hr

This role is hands‑on and requires ownership of the design through the complete ASIC lifecycle, from concept through tape‑out. The candidate will collaborate closely with other subsystem teams to ...

Fusion408

Principal ASIC Design Engineer

Carlsbad, CA · On-site

Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · Hybrid

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of ...

Qualcomm

ASIC Design Engineer

Santa Clara, CA · On-site

$126K - $190K/yr

This role is hands-on and requires ownership of the design through the complete ASIC lifecycle , from concept through tape-out. The candidate will collaborate closely with other subsystem teams to ...

Broadcom Inc.

Lead ASIC Design Engineer

San Jose, CA · On-site

$143.80 - $230/hr

Lead ASIC Design EngineerSkip to main content#Lead ASIC Design Engineer page is loaded## Lead ASIC Design EngineerApplylocations: USA-California-San Jose-1320 Ridder Park Drivetime type: Full ...

Marvell

Senior Manager, ASIC Design

Santa Clara, CA · On-site

What You Can Expect We are seeking an experienced Senior Manager, ASIC Design to lead our ASIC chip design team. Reporting to the Senior Director, ASIC Engineering, you will manage a team and oversee ...

Ayar Labs

Sr. Engineer, ASIC Design

San Jose, CA

$160K - $192K/yr

Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...

Qualcomm

Principal Engineer SOC/ASIC Design

San Diego, CA · On-site

$192K - $288K/yr

OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. Preferred Qualifications: • Master's degree in ...

Qualcomm

Principal Engineer SOC/ASIC Design

San Diego, CA · On-site

$192K - $288K/yr

OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. Preferred Qualifications: • Master's degree in ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · Hybrid

NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...

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All JobsAsic Design JobsAsic Design Jobs in California

Asic Design information

See California salary details

$92.8K

$148.2K

$199.4K

How much do asic design jobs pay per year?

As of Aug 9, 2026, the average yearly pay for asic design in California is $148,229.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,800.00 and $177,600.00 per year, depending on experience, location, and employer.

How much do ASIC designers make?

ASIC designers typically earn a median annual salary ranging from $80,000 to $150,000, depending on experience, location, and industry. Senior roles or those with specialized skills in hardware description languages and FPGA tools can earn higher salaries, often exceeding $200,000 with bonuses and benefits.

What are the key skills and qualifications needed to thrive as an ASIC design engineer?

To thrive as an ASIC Design Engineer, you need a solid background in digital design principles, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with EDA tools like Cadence or Synopsys, as well as knowledge of simulation and verification methodologies, is typically required. Strong problem-solving abilities, attention to detail, and effective teamwork are crucial soft skills in this role. These competencies ensure accurate, efficient chip designs and smooth collaboration throughout complex development cycles.

What is an ASIC design?

ASIC design involves creating custom integrated circuits tailored for specific applications, requiring knowledge of hardware description languages like VHDL or Verilog. It includes stages such as architecture definition, logic design, verification, and physical implementation, often using specialized EDA tools. ASIC designers need strong technical skills and understanding of digital logic and semiconductor manufacturing processes.

What is the difference between Asic Design vs FPGA Design?

AspectAsic DesignFPGA Design
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; knowledge of VLSI designSimilar credentials; often requires knowledge of FPGA programming languages like VHDL/Verilog
Work EnvironmentDesigning custom chips in semiconductor labs or design housesImplementing and testing designs on FPGA boards in labs or development environments
Industry UsageUsed in high-volume, performance-critical applications like smartphones, serversUsed for prototyping, testing, and low to medium volume applications

While both Asic Design and FPGA Design involve hardware description languages and digital logic, Asic Design focuses on creating custom chips for high-volume production, requiring detailed fabrication knowledge. FPGA Design emphasizes flexible, reprogrammable hardware for testing and prototyping. Understanding these differences helps professionals choose the right career path or project focus within the hardware design industry.

Is ASIC design in demand?

ASIC design is in high demand due to the growth of specialized hardware for applications like AI, 5G, and IoT. Professionals with skills in hardware description languages such as VHDL or Verilog, and experience with FPGA prototyping, are particularly sought after in the industry.

What are some common challenges faced by ASIC design engineers during the chip development process?

ASIC Design Engineers often encounter challenges such as balancing power, performance, and area (PPA) constraints while meeting tight project deadlines. Debugging complex hardware issues during simulation and verification phases requires keen analytical skills and attention to detail. Collaboration with cross-functional teams—including verification, physical design, and test engineering—is essential to ensure design specifications are met and to address integration issues. Staying updated with evolving EDA tools and methodologies is also crucial for success in this fast-paced field.

What is an ASIC designer?

ASIC designers are engineers who specialize in creating application-specific integrated circuits (ASICs), which are custom-designed semiconductor chips tailored for a particular use or product. They are responsible for designing, verifying, and testing hardware components at the microchip level to ensure optimal performance and efficiency. ASIC designers work closely with electronic design automation (EDA) tools, collaborate with software and hardware teams, and follow rigorous design cycles to meet project specifications. Their work is crucial in industries such as telecommunications, consumer electronics, automotive, and data centers where custom silicon solutions are required.
What are the most commonly searched types of Asic Design jobs in California? The most popular types of Asic Design jobs in California are:
What are popular job titles related to Asic Design jobs in California? For Asic Design jobs in California, the most frequently searched job titles are:
What job categories do people searching Asic Design jobs in California look for? The top searched job categories for Asic Design jobs in California are:
What cities in California are hiring for Asic Design jobs? Cities in California with the most Asic Design job openings:
Asic Design jobs near you
Infographic showing various Asic Design job openings in California as of August 2026, with employment types broken down into 1% Internship, 76% Full Time, 17% Part Time, 2% Temporary, and 4% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $148,229 per year, or $71.3 per hour.

ASIC Design Engineer

Qualcomm

Santa Clara, CA • On-site

$126.70 - $190.10/hr

Other

Re-posted 28 days ago

Qualcomm rating

8.8

Company rating: 8.8 out of 10

Based on 11 frontline employees who took The Breakroom Quiz

51st of 242 rated software companies

Job description

Company

Qualcomm Atheros, Inc.

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

Qualcomm-Atheros, a.k.a. QCA is a wholly owned subsidiary of Qualcomm and a leading provider of wireless technologies for the mobile, networking, computing and consumer electronics markets. As a key member of a fast‑paced Integrated Wireless Technology team you will be working with WiFi (802.11x) technology, SOC infrastructure, chip level verification and employ best‑in‑class Design and verification methodology.

Responsibilities

The candidate will be responsible for micro‑architecture, RTL design, and development of new functional blocks, as well as subsystem and full‑chip integration. This role is hands‑on and requires ownership of the design through the complete ASIC lifecycle, from concept through tape‑out. The candidate will collaborate closely with other subsystem teams to ensure smooth integration of releases, while interfacing with verification, DFT, FPGA emulation, and implementation teams.

Required Skills
  • 5+ years of industry experience in ASIC design, micro‑architecture, and design integration
  • Strong background in SoC micro‑architecture, including specification, definition, and implementation of functional blocks
  • Hands‑on experience with multi‑domain clocking implementation in SOCs including understanding of clocking architectures, clock/power domain partitioning
  • Experience in Design linting and CDC analysis, including triage and closure of violations
  • Solid understanding of AMBA bus protocols, including AHB and APB
  • Proficiency in Python/Perl is required
  • Exposure to AI/ML based design methodologies is a strong plus
Minimum Qualifications
  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
  • Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience
  • PhD in Science, Engineering, or related field
Preferred Skills
  • Experience with ARM CoreSight architecture and debug interfaces
  • Experience with AXI Bus protocol
  • Experience with PCIe and/or USB peripheral subsystems
  • Low Power design and implementation
  • Chip interconnect (NOC) implementation
Pay range and Other Compensation & Benefits

$126,700.00 - $190,100.00. The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.

EEO Statement

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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About Qualcomm

Sourced by ZipRecruiter

Qualcomm is enabling a world where everyone and everything can be intelligently connected. You interact with products and technologies made possible by Qualcomm every day, including 5G-enabled smartphones that double as pro-level cameras and gaming devices, smarter vehicles and cities, and the technology behind the smart, connected factories that manufactured your latest purchase. Our powerful connectivity solutions keep you connected—even in remote areas. Qualcomm 5G and AI innovations are the power behind the connected intelligent edge. You’ll find our technologies behind and inside the innovations that deliver significant value across multiple industries and to billions of people every day.

Industry

Technology, communication and media

Company size

10,000+ Employees

Headquarters location

San Diego, CA, US

Year founded

1985

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