Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...
Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...
Principal ASIC Design Engineer
Carlsbad, CA · On-site
Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...
Principal ASIC Design Engineer
Carlsbad, CA · On-site
Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor ...
Senior ASIC Design Engineer with Security Clearance
Saratoga, CA · On-site
$250K - $290K/yr
Piper Companies is looking for a Senior ASIC Design Engineer to join a cutting-edge AI networking company onsite in Saratoga, CA Monday - Friday , to help define and build the next generation of high ...
Senior ASIC Design Engineer with Security Clearance
Saratoga, CA · On-site
$250K - $290K/yr
Piper Companies is looking for a Senior ASIC Design Engineer to join a cutting-edge AI networking company onsite in Saratoga, CA Monday - Friday , to help define and build the next generation of high ...
Senior ASIC Design Engineer
Santa Clara, CA · On-site
NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...
Senior ASIC Design Engineer
Santa Clara, CA · On-site
NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...
ASIC Design Engineer lll
Sunnyvale, CA · On-site
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
ASIC Design Engineer lll
Sunnyvale, CA · On-site
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
ASIC Design Engineer lll
Sunnyvale, CA · On-site
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
ASIC Design Engineer lll
Sunnyvale, CA · On-site
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
Principal ASIC Design Engineer
San Jose, CA · On-site
About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...
Quick apply
Principal ASIC Design Engineer
San Jose, CA · On-site
About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
ASIC Design Engineer lll
Sunnyvale, CA · On-site
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
ASIC Design Engineer lll
Sunnyvale, CA · On-site
ASIC Design Engineer lll This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
Principal ASIC Design Engineer
San Jose, CA · On-site
$180K - $210K/yr
About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...
Principal ASIC Design Engineer
San Jose, CA · On-site
$180K - $210K/yr
About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...
ASIC Design Engineer Responsibilities: * Define and bring up FPGA platforms for pre-silicon validation and software development * Map ASIC RTL to FGPA while minimizing code base differences * Create ...
Quick apply
ASIC Design Engineer Responsibilities: * Define and bring up FPGA platforms for pre-silicon validation and software development * Map ASIC RTL to FGPA while minimizing code base differences * Create ...
ASIC Design Engineer
Santa Clara, CA · On-site
$126K - $190K/yr
OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related ...
ASIC Design Engineer
Santa Clara, CA · On-site
$126K - $190K/yr
OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related ...
Principal ASIC Design Engineer
San Jose, CA · On-site
$180K - $210K/yr
About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...
Principal ASIC Design Engineer
San Jose, CA · On-site
$180K - $210K/yr
About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...
NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...
NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity ...
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity ...
Qualifications * Bachelor's degree in electrical engineering, or related Sciences * 6+ years of experience in ASIC design * Experience and understanding of ASIC design flow: Architecture ...
Qualifications * Bachelor's degree in electrical engineering, or related Sciences * 6+ years of experience in ASIC design * Experience and understanding of ASIC design flow: Architecture ...
Senior ASIC Design Engineer
Santa Clara, CA · On-site +1
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted ...
Senior ASIC Design Engineer
Santa Clara, CA · On-site +1
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted ...
Principal ASIC Design Engineer (Starshield)
$200K - $285K/yr
PRINCIPAL ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...
Principal ASIC Design Engineer (Starshield)
$200K - $285K/yr
PRINCIPAL ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...
Senior ASIC Design Engineer
Santa Clara, CA · On-site
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted ...
Senior ASIC Design Engineer
Santa Clara, CA · On-site
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted ...
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity ...
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity ...
Asic Design Engineer information
See California salary details
$92.8K - $102.5K
16% of jobs
$102.5K - $112.1K
3% of jobs
$112.1K - $121.8K
4% of jobs
$124.7K is the 25th percentile. Wages below this are outliers.
$121.8K - $131.5K
6% of jobs
The median wage is $137.6K / yr.
$131.5K - $141.2K
33% of jobs
$141.2K - $150.9K
3% of jobs
$150.9K - $160.6K
2% of jobs
$167K is the 75th percentile. Wages above this are outliers.
$160.6K - $170.3K
12% of jobs
$170.3K - $180K
5% of jobs
$180K - $189.7K
4% of jobs
$189.7K - $199.4K
12% of jobs
$92.8K
$148.2K
$199.4K
How much do asic design engineer jobs pay per year?
What is the difference between Asic Design Engineer vs FPGA Design Engineer?
| Aspect | Asic Design Engineer | FPGA Design Engineer |
|---|---|---|
| Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering | Bachelor's/Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Designing custom chips for manufacturing | Developing programmable logic designs for prototyping and deployment |
| Industry Usage | Semiconductor companies, consumer electronics, automotive | Prototyping, testing, and specialized hardware applications |
Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.
How much does an ASIC design engineer make?
What are some common challenges faced by ASIC Design Engineers during the design and verification phases?
Are ASIC design engineers in demand?
What engineer makes $500,000 a year?
What are the key skills and qualifications needed to thrive as an ASIC Design Engineer, and why are they important?
What are ASIC Design Engineers?
What Does an ASIC Design Engineer Do?
An application specific integrated circuit (ASIC) is an electronic circuit created for a specific purpose, rather than for general use. ASIC design engineers create product design specification (PDS) statements for ASIC, optimize logic design, and create architectural design models. ASIC design engineers often work on a team to deliver ASIC design solutions for standard and complex computing. Knowledge of computer-aided design (CAD) tools, logic simulation, Verilog, and other hardware description languages (HDLs) is integral to career success.
What is the salary of ASIC design engineer?

Other
Re-posted 20 days ago
Job description
Principal ASIC Design Engineer Description: Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor device modeling. Requirements: Principal Engineer will be responsible for design and development from multiple ASIC blocks to a complete Core/Chip in communications/digital signal processing (DSP) IC products. These include building blocks/Cores for communication functions.
The responsibility includes working with system engineering or product marketing department to close design specifications, define block/core/chip architectures, carry out and verify the design. Need to Have: Communications/DSP algorithm and efficient implementations. System-on-the-chip architectures Knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, synthesizing and supporting timing closure.
Design experience in Communications/DSP building blocks and/or SOC functional modules. Experience with design tools such as NCSIM (and/or VCS), Cadence RC or Synopsys DC compiler, Experience with multiple IC tape-out in industry. Experience in chip bring up and performance measurement for IC and systems in laboratory to characterize and debug building blocks MS in EE with 12 years of experience or Ph.D
in EE with 10 years of experience.