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Entry Level Asic Design Engineer Jobs in California

Infoyogi LLC

ASIC/RTL Design Engineer

San Jose, CA

ASIC/RTL Design Engineer Location: San Jose, CA Duration : 12 months plus JOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. The ideal candidate will have experience in ASIC design with:- Architecture research and/or development of ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. The ideal candidate will have experience in ASIC design with:- Architecture research and/or development of ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. The ideal candidate will have experience in ASIC design with:- Architecture research and/or development of ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. The ideal candidate will have experience in ASIC design with:- Architecture research and/or development of ...

Nvidia

ASIC Design Engineer

Santa Clara, CA · On-site

As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support everything from consumer graphics to self-driving cars and artificial intelligence. You will be part ...

Apple

ASIC Design Engineer

Santa Clara, CA

$126K - $190K/yr

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or ...

Nvidia Corporation

ASIC Design Engineer

Santa Clara, CA · On-site

As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support everything from consumer graphics to self-driving cars and artificial intelligence. You will be part ...

Apple

ASIC Design Engineer

Santa Clara, CA

$126K - $190K/yr

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or ...

Apple

ASIC Design Engineer

Santa Clara, CA

$147K - $272K/yr

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or ...

Apple

ASIC Design Engineer

Santa Clara, CA

$181K - $318K/yr

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or ...

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Entry Level Asic Design Engineer information

See California salary details

$92.8K

$148.2K

$199.4K

How much do entry level asic design engineer jobs pay per year?

As of Jun 17, 2026, the average yearly pay for entry level asic design engineer in California is $148,229.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,800.00 and $177,600.00 per year, depending on experience, location, and employer.

What is an Entry Level ASIC Design Engineer job?

An Entry Level ASIC Design Engineer is responsible for assisting in the design, development, and testing of Application-Specific Integrated Circuits (ASICs). They work with senior engineers to define specifications, write hardware descriptions using languages like Verilog or VHDL, and perform simulations to validate designs. They may also collaborate with verification teams, support synthesis and timing analysis, and help troubleshoot design issues. This role requires a strong foundation in digital logic design, semiconductor fundamentals, and hardware design methodologies.

What are the typical daily responsibilities for an Entry Level ASIC Design Engineer?

As an Entry Level ASIC Design Engineer, your daily tasks often include writing and debugging code in hardware description languages, running simulations to verify functionality, and collaborating with senior engineers to implement and optimize chip designs. You may also assist with testbench development, participate in design reviews, and document your progress for project tracking. Expect to work closely with a multidisciplinary team—including verification, layout, and software engineers—to ensure the final product meets performance and reliability standards. This collaborative, fast-paced environment provides valuable hands-on experience and growth opportunities for engineers early in their careers.

What are the key skills and qualifications needed to thrive in the Entry Level Asic Design Engineer position, and why are they important?

To thrive as an Entry Level ASIC Design Engineer, you need a solid understanding of digital logic design, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools like Synopsys or Cadence and experience with simulation and verification environments are commonly expected. Strong problem-solving skills, effective communication, and the ability to work collaboratively make candidates stand out. These competencies enable precise design, successful project collaboration, and adaptation to the fast-paced, detail-oriented nature of ASIC development.

What are the most commonly searched types of Asic Design Engineer jobs in California? The most popular types of Asic Design Engineer jobs in California are:
What are popular job titles related to Entry Level Asic Design Engineer jobs in California? For Entry Level Asic Design Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Entry Level Asic Design Engineer jobs in California look for? The top searched job categories for Entry Level Asic Design Engineer jobs in California are:
What cities in California are hiring for Entry Level Asic Design Engineer jobs? Cities in California with the most Entry Level Asic Design Engineer job openings:
Entry Level Asic Design Engineer jobs near you
Infographic showing various Entry Level Asic Design Engineer job openings in California as of June 2026, with employment types broken down into 9% Internship, and 91% Full Time. Highlights an 100% In-person job distribution, with an average salary of $148,229 per year, or $71.3 per hour.
ASIC Design Engineer

ASIC Design Engineer

Black Sesame Technologies Inc

San Jose, CA

Other

Posted 28 days ago

Job description

About Black Sesame Technologies

Founded in 2016 and listed on the Hong Kong Stock Exchange (HKEX: 2533), Black Sesame Technologies is a leading AI SoC provider. Our mass-produced AI chips are already deployed in the Automotive and Robotics markets, delivering high-performance, automotive-grade compute solutions at scale. Join us to build the future of intelligent machines from the ground up.


Job Description: ASIC Design Engineer

In this role, you will be part of the core team designing our next-generation AI compute engines. You will go beyond high-level RTL, diving into the fundamental hardware constraints that make high-performance AI silicon possible. You will focus on optimizing high-speed datapath logic while ensuring the design meets rigorous timing and power requirements.

Responsibilities

  • RTL Design: Implement high-efficiency logic modules using SystemVerilog/Verilog, focusing on AI-specific ALU and datapath components.
  • STA & Timing: Analyze and fix timing violations (Setup/Hold) to ensure the design closes at target frequencies.
  • Low Power & PPA: Apply basic low-power techniques (e.g., Clock Gating) and analyze their impact on PPA.
  • Design Sign-off: Run Lint, CDC (Clock Domain Crossing), and RDC (Reset Domain Crossing) checks to ensure robust silicon behavior.
  • Backend Collaboration: Work closely with the physical design team to understand and resolve congestion and timing issues.

Basic Qualifications

  • BS/MS in Electrical Engineering or Computer Engineering.
  • Hardware Fundamentals: Deep understanding of CMOS logic, Setup/Hold time, Skew/Jitter, and the impact of PVT (Process, Voltage, Temperature) corners.
  • STA Knowledge: Familiar with the concept of Static Timing Analysis, including path delays, false paths, and multi-cycle paths.
  • HDL Proficiency: Strong coding skills in SystemVerilog/Verilog with an emphasis on synthesizeable code and hardware-oriented thinking.
  • Digital Architecture: Understanding of pipelining, stalling, and bypass logic in high-performance datapaths.
  • Scripting: Proficiency in Python, Shell, or TCL (essential for EDA tool interaction).

You would be a "Star Candidate" if you have:

  • ASIC Flow Experience: Familiarity with the industry-standard ASIC design flow (from RTL to GDSII).
  • ALU/Math Foundations: Knowledge of computer arithmetic (Fixed-point, IEEE-754) and its hardware implementation.
  • Advanced CDC: Experience handling complex asynchronous interfaces and synchronization techniques.
  • RISC-V Exposure: Understanding of RISC-V ISA and its pipeline stages.

Apply