Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi.
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi.
Sr. ASIC Design Engineer
Roseville, CA · On-site
Sr. ASIC Design Engineer This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
Sr. ASIC Design Engineer
Roseville, CA · On-site
Sr. ASIC Design Engineer This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in De.
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in De.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon
Sr. ASIC Design Engineer This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
Sr. ASIC Design Engineer This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
Sr. ASIC Design Engineer
Roseville, CA · On-site
Sr. ASIC Design Engineer This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
Sr. ASIC Design Engineer
Roseville, CA · On-site
Sr. ASIC Design Engineer This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to ...
ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs
Cupertino, CA · On-site
Key job responsibilities As an ASIC Design Engineer, you will: Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets Conduct in-depth ...
ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs
Cupertino, CA · On-site
Key job responsibilities As an ASIC Design Engineer, you will: Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets Conduct in-depth ...
Key job responsibilities As an ASIC Design Engineer, you will: Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets Conduct in-depth ...
Key job responsibilities As an ASIC Design Engineer, you will: Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets Conduct in-depth ...
As a Senior ASIC Design Engineer, you will be part of an advanced design and architecture team that is creating the semiconductor designs which will power millions of new Amazon devices. You will ...
As a Senior ASIC Design Engineer, you will be part of an advanced design and architecture team that is creating the semiconductor designs which will power millions of new Amazon devices. You will ...
As a Senior ASIC Design Engineer, you will be part of an advanced design and architecture team that is creating the semiconductor designs which will power millions of new Amazon devices. You will ...
As a Senior ASIC Design Engineer, you will be part of an advanced design and architecture team that is creating the semiconductor designs which will power millions of new Amazon devices. You will ...
RTL Design Engineer (Silicon Engineering)
Irvine, CA · On-site
$145K - $195K/yr
RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building ... Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level ...
RTL Design Engineer (Silicon Engineering)
Irvine, CA · On-site
$145K - $195K/yr
RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building ... Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level ...
Description As a Pixel IP DMA Design Engineer in the Pixel IP team, you will work closely with ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
Description As a Pixel IP DMA Design Engineer in the Pixel IP team, you will work closely with ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
ASIC Engineer, Design Verification
Sunnyvale, CA · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...
ASIC Engineer, Design Verification
Sunnyvale, CA · On-site +1
$114K/yr
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...
ASIC Design Engineer - Neural Engine DMA
$129K - $194K/yr
Description As an ASIC Design Engineer on the ANE DMA Design team, you will contribute to the design of DMA subsystem blocks from microarchitecture specification through tapeout. High-performance DMA ...
ASIC Design Engineer - Neural Engine DMA
$129K - $194K/yr
Description As an ASIC Design Engineer on the ANE DMA Design team, you will contribute to the design of DMA subsystem blocks from microarchitecture specification through tapeout. High-performance DMA ...
Come work at Amazon! We're hiring an ASIC Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role: Be part of Leo ...
Come work at Amazon! We're hiring an ASIC Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP's. The Role: Be part of Leo ...
We are now looking for a Logic Design Engineer. As a member of our CPU Logic Design Team, you will ... Verilog expertise required as is a deep understanding of ASIC design flow including RTL design ...
We are now looking for a Logic Design Engineer. As a member of our CPU Logic Design Team, you will ... Verilog expertise required as is a deep understanding of ASIC design flow including RTL design ...
Description As a Pixel IP DMA Design Engineer in the Pixel IP team, you will work closely with ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
Description As a Pixel IP DMA Design Engineer in the Pixel IP team, you will work closely with ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
ASIC Design Engineer - Neural Engine DMA
$150K - $277K/yr
Description As an ASIC Design Engineer on the ANE DMA Design team, you will own the design of DMA subsystem blocks from microarchitecture specification through tapeout. ANE DMA's scale and complexity ...
ASIC Design Engineer - Neural Engine DMA
$150K - $277K/yr
Description As an ASIC Design Engineer on the ANE DMA Design team, you will own the design of DMA subsystem blocks from microarchitecture specification through tapeout. ANE DMA's scale and complexity ...
We are now looking for a Logic Design Engineer. As a member of our CPU Logic Design Team, you will ... Verilog expertise required as is a deep understanding of ASIC design flow including RTL design ...
We are now looking for a Logic Design Engineer. As a member of our CPU Logic Design Team, you will ... Verilog expertise required as is a deep understanding of ASIC design flow including RTL design ...
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Entry Level Asic Design Engineer information
See California salary details
$92.8K - $102.5K
16% of jobs
$102.5K - $112.1K
3% of jobs
$112.1K - $121.8K
4% of jobs
$124.7K is the 25th percentile. Wages below this are outliers.
$121.8K - $131.5K
6% of jobs
The median wage is $137.6K / yr.
$131.5K - $141.2K
33% of jobs
$141.2K - $150.9K
3% of jobs
$150.9K - $160.6K
2% of jobs
$167K is the 75th percentile. Wages above this are outliers.
$160.6K - $170.3K
12% of jobs
$170.3K - $180K
5% of jobs
$180K - $189.7K
4% of jobs
$189.7K - $199.4K
12% of jobs
$92.8K
$148.2K
$199.4K
How much do entry level asic design engineer jobs pay per year?
As of Aug 6, 2026, the average yearly pay for entry level asic design engineer in California is $148,229.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,800.00 and $177,600.00 per year, depending on experience, location, and employer.
What is an entry level ASIC design engineer?
An Entry Level ASIC Design Engineer is responsible for assisting in the design, development, and testing of Application-Specific Integrated Circuits (ASICs). They work with senior engineers to define specifications, write hardware descriptions using languages like Verilog or VHDL, and perform simulations to validate designs. They may also collaborate with verification teams, support synthesis and timing analysis, and help troubleshoot design issues. This role requires a strong foundation in digital logic design, semiconductor fundamentals, and hardware design methodologies.
What are the typical daily responsibilities for an entry level ASIC design engineer?
As an Entry Level ASIC Design Engineer, your daily tasks often include writing and debugging code in hardware description languages, running simulations to verify functionality, and collaborating with senior engineers to implement and optimize chip designs. You may also assist with testbench development, participate in design reviews, and document your progress for project tracking. Expect to work closely with a multidisciplinary team—including verification, layout, and software engineers—to ensure the final product meets performance and reliability standards. This collaborative, fast-paced environment provides valuable hands-on experience and growth opportunities for engineers early in their careers.
What are the key skills and qualifications needed to thrive in the entry level ASIC design engineer position, and why are they important?
To thrive as an Entry Level ASIC Design Engineer, you need a solid understanding of digital logic design, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools like Synopsys or Cadence and experience with simulation and verification environments are commonly expected. Strong problem-solving skills, effective communication, and the ability to work collaboratively make candidates stand out. These competencies enable precise design, successful project collaboration, and adaptation to the fast-paced, detail-oriented nature of ASIC development.
What are the most commonly searched types of Asic Design Engineer jobs in California? The most popular types of Asic Design Engineer jobs in California are:
What job categories do people searching Entry Level Asic Design Engineer jobs in California look for? The top searched job categories for Entry Level Asic Design Engineer jobs in California are:
What cities in California are hiring for Entry Level Asic Design Engineer jobs? Cities in California with the most Entry Level Asic Design Engineer job openings:
Meta rating
7.8
Based on 45 frontline employees who took The Breakroom Quiz
135th of 242 rated software companies
Job description
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verifi...
About Meta
Sourced by ZipRecruiter
Industry
Internet and it, media and telecom and software development
Company size
10,000+ Employees
Headquarters location
Menlo Park, CA, US