ASIC Design Engineer
Cupertino, CA · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
Cupertino, CA · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
Cupertino, CA · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
Santa Clara, CA · On-site
$180 - $240/hr
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands‑on experience across the full ASIC development ...
Santa Clara, CA · On-site
$180 - $240/hr
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands‑on experience across the full ASIC development ...
Hawthorne, CA · On-site
$160K - $225K/yr
SR. ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...
Hawthorne, CA · On-site
$160K - $225K/yr
SR. ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...
Santa Clara, CA · On-site
$100 - $189.75/hr
## ASIC Design Engineer - New College Grad 2026Applylocations: US, CA, Santa Claratime type: Full timeposted on: Posted 22 Days Agojob requisition id: JR2020309NVIDIA is seeking ASIC Design Engineers to ...
Santa Clara, CA · On-site
$100 - $189.75/hr
## ASIC Design Engineer - New College Grad 2026Applylocations: US, CA, Santa Claratime type: Full timeposted on: Posted 22 Days Agojob requisition id: JR2020309NVIDIA is seeking ASIC Design Engineers to ...
Cupertino, CA · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
Cupertino, CA · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
Hawthorne, CA · On-site
$200K - $285K/yr
PRINCIPAL ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...
Hawthorne, CA · On-site
$200K - $285K/yr
PRINCIPAL ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development ...
The Mixed-Signal IP team at Qualcomm is seeking skilled RTL and ASIC design engineers to contribute to the development of next-generation Mixed-Signal IPs - including DAC, ADC, and PLLs - for ...
The Mixed-Signal IP team at Qualcomm is seeking skilled RTL and ASIC design engineers to contribute to the development of next-generation Mixed-Signal IPs - including DAC, ADC, and PLLs - for ...
San Diego, CA · On-site
$115.60 - $173.40/hr
Overview The Mixed-Signal IP team at Qualcomm is seeking skilled RTL and ASIC design engineers to contribute to the development of next-generation Mixed-Signal IPs -- including DAC, ADC, and PLLs ...
San Diego, CA · On-site
$115.60 - $173.40/hr
Overview The Mixed-Signal IP team at Qualcomm is seeking skilled RTL and ASIC design engineers to contribute to the development of next-generation Mixed-Signal IPs -- including DAC, ADC, and PLLs ...
San Jose, CA · On-site
$155K - $222K/yr
Your Impact As an ASIC Design Engineer on the STA team, you will play a pivotal role in extraction and static timing analysis (STA) flow development, convergence strategies, and correlation between ...
San Jose, CA · On-site
$155K - $222K/yr
Your Impact As an ASIC Design Engineer on the STA team, you will play a pivotal role in extraction and static timing analysis (STA) flow development, convergence strategies, and correlation between ...
Santa Clara, CA · On-site
$175K/yr
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development ...
Santa Clara, CA · On-site
$175K/yr
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...
Lead and mentor a small team of FPGA/ASIC design engineers, including resource planning, project scheduling, and technical mentoring/oversight * Own solution architecture end-to-end--taking marketing ...
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Lead and mentor a small team of FPGA/ASIC design engineers, including resource planning, project scheduling, and technical mentoring/oversight * Own solution architecture end-to-end--taking marketing ...
Apple's Silicon Security team is looking for a driven ASIC Design Engineer to build the secure subsystems that protect the entire Apple SoC. In this role, you will design the state-of-the-art ...
Apple's Silicon Security team is looking for a driven ASIC Design Engineer to build the secure subsystems that protect the entire Apple SoC. In this role, you will design the state-of-the-art ...
Santa Clara, CA · On-site
We are searching for a dedicated engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or ...
Santa Clara, CA · On-site
We are searching for a dedicated engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or ...
Irvine, CA · On-site
$190K - $225K/yr
Lead and mentor a small team of FPGA/ASIC design engineers, including resource planning, project scheduling, and technical mentoring/oversight * Own solution architecture end-to-end-taking marketing ...
Irvine, CA · On-site
$190K - $225K/yr
Lead and mentor a small team of FPGA/ASIC design engineers, including resource planning, project scheduling, and technical mentoring/oversight * Own solution architecture end-to-end-taking marketing ...
Hawthorne, CA · On-site
$160K - $225K/yr
As an ASIC Design Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security. In this role, you will be developing cutting-edge next ...
Hawthorne, CA · On-site
$160K - $225K/yr
As an ASIC Design Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security. In this role, you will be developing cutting-edge next ...
Irvine, CA · On-site
$108K - $172K/yr
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...
Irvine, CA · On-site
$108K - $172K/yr
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...
Irvine, CA · On-site
$127.10 - $203.40/hr
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...
Irvine, CA · On-site
$127.10 - $203.40/hr
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...
$92.8K - $102.5K
16% of jobs
$102.5K - $112.1K
3% of jobs
$112.1K - $121.8K
4% of jobs
$124.7K is the 25th percentile. Wages below this are outliers.
$121.8K - $131.5K
6% of jobs
The median wage is $137.6K / yr.
$131.5K - $141.2K
33% of jobs
$141.2K - $150.9K
3% of jobs
$150.9K - $160.6K
2% of jobs
$167K is the 75th percentile. Wages above this are outliers.
$160.6K - $170.3K
12% of jobs
$170.3K - $180K
5% of jobs
$180K - $189.7K
4% of jobs
$189.7K - $199.4K
12% of jobs
$92.8K
$148.2K
$199.4K
| Aspect | Asic Design Engineer | FPGA Design Engineer |
|---|---|---|
| Credentials | Bachelor's/Master's in Electrical Engineering or Computer Engineering | Bachelor's/Master's in Electrical Engineering or Computer Engineering |
| Work Environment | Designing custom chips for manufacturing | Developing programmable logic designs for prototyping and deployment |
| Industry Usage | Semiconductor companies, consumer electronics, automotive | Prototyping, testing, and specialized hardware applications |
Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.
An application specific integrated circuit (ASIC) is an electronic circuit created for a specific purpose, rather than for general use. ASIC design engineers create product design specification (PDS) statements for ASIC, optimize logic design, and create architectural design models. ASIC design engineers often work on a team to deliver ASIC design solutions for standard and complex computing. Knowledge of computer-aided design (CAD) tools, logic simulation, Verilog, and other hardware description languages (HDLs) is integral to career success.

8.0
Based on 677 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Computer and electronic product manufacturing
10,000+ Employees
Cupertino, CA, US
1976