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Asic Design Jobs in California (NOW HIRING)

Ayar Labs

Sr. Engineer, ASIC Design

San Jose, CA · On-site

$160 - $192/hr

The ASIC Engineer is responsible for design and integration of complex SoCs with both high-speed custom and digital blocks. You will work in a dynamic startup environment as part of a small IC design ...

Ayar Labs

Sr. Engineer, ASIC Design

San Jose, CA · On-site

$160K - $192K/yr

Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light ...

Micron

Principal Engineer, ASIC Design

San Jose, CA

$198K - $336K/yr

We are building the next generation of solidstate drive controllers at Micron, where cuttingedge ASIC design meets highperformance storage innovation. Our team works across the full silicon lifecycle ...

Cornelis Networks

PCIe ASIC Design Engineer

San Jose, CA · On-site +1

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · On-site

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology ...

Ayar Labs

Sr. Staff Engineer, ASIC Design

San Jose, CA · On-site

$180K - $223K/yr

Sr. Staff Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using ...

Jobsbridge

ASIC Engineer

San Jose, CA · On-site

$194K/yr

ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal (Cadence Tool for formal verification) Description: Should have 2-5 years of experience in FPGA/ASIC ...

Ayar Labs

Sr. Staff Engineer, ASIC Design

San Jose, CA

$170K - $223K/yr

Sr. Staff Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · On-site +1

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or development of memory or highly interconnected system architectures. - RTL/micro-architecture ...

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Showing results 21-40

All JobsAsic Design JobsAsic Design Jobs in California

Asic Design information

See California salary details

$92.8K

$148.2K

$199.4K

How much do asic design jobs pay per year?

As of Aug 9, 2026, the average yearly pay for asic design in California is $148,229.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,800.00 and $177,600.00 per year, depending on experience, location, and employer.

How much do ASIC designers make?

ASIC designers typically earn a median annual salary ranging from $80,000 to $150,000, depending on experience, location, and industry. Senior roles or those with specialized skills in hardware description languages and FPGA tools can earn higher salaries, often exceeding $200,000 with bonuses and benefits.

What are the key skills and qualifications needed to thrive as an ASIC design engineer?

To thrive as an ASIC Design Engineer, you need a solid background in digital design principles, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with EDA tools like Cadence or Synopsys, as well as knowledge of simulation and verification methodologies, is typically required. Strong problem-solving abilities, attention to detail, and effective teamwork are crucial soft skills in this role. These competencies ensure accurate, efficient chip designs and smooth collaboration throughout complex development cycles.

What is an ASIC design?

ASIC design involves creating custom integrated circuits tailored for specific applications, requiring knowledge of hardware description languages like VHDL or Verilog. It includes stages such as architecture definition, logic design, verification, and physical implementation, often using specialized EDA tools. ASIC designers need strong technical skills and understanding of digital logic and semiconductor manufacturing processes.

What is the difference between Asic Design vs FPGA Design?

AspectAsic DesignFPGA Design
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; knowledge of VLSI designSimilar credentials; often requires knowledge of FPGA programming languages like VHDL/Verilog
Work EnvironmentDesigning custom chips in semiconductor labs or design housesImplementing and testing designs on FPGA boards in labs or development environments
Industry UsageUsed in high-volume, performance-critical applications like smartphones, serversUsed for prototyping, testing, and low to medium volume applications

While both Asic Design and FPGA Design involve hardware description languages and digital logic, Asic Design focuses on creating custom chips for high-volume production, requiring detailed fabrication knowledge. FPGA Design emphasizes flexible, reprogrammable hardware for testing and prototyping. Understanding these differences helps professionals choose the right career path or project focus within the hardware design industry.

Is ASIC design in demand?

ASIC design is in high demand due to the growth of specialized hardware for applications like AI, 5G, and IoT. Professionals with skills in hardware description languages such as VHDL or Verilog, and experience with FPGA prototyping, are particularly sought after in the industry.

What are some common challenges faced by ASIC design engineers during the chip development process?

ASIC Design Engineers often encounter challenges such as balancing power, performance, and area (PPA) constraints while meeting tight project deadlines. Debugging complex hardware issues during simulation and verification phases requires keen analytical skills and attention to detail. Collaboration with cross-functional teams—including verification, physical design, and test engineering—is essential to ensure design specifications are met and to address integration issues. Staying updated with evolving EDA tools and methodologies is also crucial for success in this fast-paced field.

What is an ASIC designer?

ASIC designers are engineers who specialize in creating application-specific integrated circuits (ASICs), which are custom-designed semiconductor chips tailored for a particular use or product. They are responsible for designing, verifying, and testing hardware components at the microchip level to ensure optimal performance and efficiency. ASIC designers work closely with electronic design automation (EDA) tools, collaborate with software and hardware teams, and follow rigorous design cycles to meet project specifications. Their work is crucial in industries such as telecommunications, consumer electronics, automotive, and data centers where custom silicon solutions are required.
What are the most commonly searched types of Asic Design jobs in California? The most popular types of Asic Design jobs in California are:
What are popular job titles related to Asic Design jobs in California? For Asic Design jobs in California, the most frequently searched job titles are:
What job categories do people searching Asic Design jobs in California look for? The top searched job categories for Asic Design jobs in California are:
What cities in California are hiring for Asic Design jobs? Cities in California with the most Asic Design job openings:
Asic Design jobs near you
Infographic showing various Asic Design job openings in California as of August 2026, with employment types broken down into 1% Internship, 76% Full Time, 17% Part Time, 2% Temporary, and 4% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $148,229 per year, or $71.3 per hour.

Sr. Engineer, ASIC Design

Ayar Labs

San Jose, CA • On-site

$160 - $192/hr

Other

Re-posted 19 days ago

Job description

The ASIC Engineer is responsible for design and integration of complex SoCs with both high-speed custom and digital blocks. You will work in a dynamic startup environment as part of a small IC design team, covering roles from custom circuit design to optical device design. Each team member is expected to contribute across a broad range of tasks and to gain new skill sets to grow with the company. The ideal candidate is a hands‑on self‑starter who can craft specifications based on input from colleagues, customers, and industry and who can effectively manage their own time to take projects to completion with limited supervision and guidance.

Key Responsibilities
  • Develop and optimize RTL designs for use in complex digital systems
  • Develop verification methodology and testbenches for digital and mixed-signal blocks
  • Bringup, evaluation, and debug of in-house custom silicon using Python scripting, firmware, and control systems
  • Create clear documentation of designs to enable backend ASIC engineers to perform physical implementation (clocks and timing constraints, floorplan guidance, testability) and collaborate to ensure timing signoff
Required Skills
  • BS or MS in Electrical Engineering, Computer Engineering, or related fields
  • 1+ years of work or academic experience in ASIC design
  • History of assuming responsibility for a variety of technical tasks and completing projects independently
  • Proficient in Verilog for both RTL design and verification
  • Proficient in ASIC verification (XCelium, VCS, Questa) tools
  • Proficient in scripting or programming languages
Preferred Skills
  • Proficient in writing timing constraints and deep understanding of timing analysis
  • Experience working on digital designs with multiple clock domains and clock dividers
  • Working knowledge integrating custom blocks in a digital-top flow (LEF, lib, etc.)
  • Performed silicon bring-up, debug, and evaluation
  • Programming experience in Python, low-level languages (C, C++)
  • Some knowledge of optics and control systems

Salary Range: $160,000 - $192,000

Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.

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