ZipRecruiter

Log In

1

Junior Rtl Design Engineer Jobs in California (NOW HIRING)

Mythic

RTL Design Engineer

Palo Alto, CA

$120K - $225K/yr

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

Mythic

RTL Design Engineer

Palo Alto, CA

$120K - $225K/yr

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

Mythic

RTL Design Engineer

Palo Alto, CA

$120K - $225K/yr

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

IBA Infotech Inc.

RTL Design Engineer

Santa Clara, CA · Hybrid

Role: (RTL) Design Engineer Location: Santa Clara, CA (Hybrid negotiable) Interview: Phone/Skype We're looking for a seasoned RTL engineer with 7+ years of experience in #RTLDesign #Verilog #VLSI ...

IBA Infotech Inc.

RTL Design Engineer

Santa Clara, CA · On-site

Role: (RTL) Design Engineer Location: Santa Clara, CA (Hybrid negotiable) Interview: Phone/Skype We're looking for a seasoned RTL engineer with 7+ years of experience in #RTLDesign #Verilog #VLSI ...

Samsung Electronics

GPU RTL Design Engineer

San Jose, CA

$139K - $208.40K/yr

Role and Responsibilities We're seeking a GPU RTL Design Engineer where you will work as part of a ... This is a junior to mid-level position where you will act as an individual contributor tasked with ...

Apple

RTL Design Engineer

Cupertino, CA

$181.10K - $318.40K/yr

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

Etched

RTL Design Engineer

Cupertino, CA

$2K/mo

RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies ...

Etched

RTL Design Engineer

Cupertino, CA · On-site

$2K/mo

RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies ...

Pacer Group

Logic (RTL) Design Engineer

Santa Clara, CA · On-site

Logic (RTL) Design Engineer Job Location: Santa Clara, CA Job Duration: 3 Months, Contract to Hire Job Summary: * The RTL Engineer performs detailed block design from system requirements and evolving ...

Apple

RTL Design Engineer

Irvine, CA

$120.30K - $210.10K/yr

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

next page

Showing results 1-20

People also search for

All JobsRtl Design Engineer JobsJunior Rtl Design Engineer JobsJunior Rtl Design Engineer Jobs in California

Junior Rtl Design Engineer information

See California salary details

$33.1K

$70.9K

$108.1K

How much do junior rtl design engineer jobs pay per year?

As of May 30, 2026, the average yearly pay for junior rtl design engineer in California is $70,859.00, according to ZipRecruiter salary data. Most workers in this role earn between $47,900.00 and $79,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Junior RTL Design Engineer, and why are they important?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are some common challenges faced by Junior RTL Design Engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What are Junior RTL Design Engineers?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are popular job titles related to Junior Rtl Design Engineer jobs in California? For Junior Rtl Design Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Junior Rtl Design Engineer jobs in California look for? The top searched job categories for Junior Rtl Design Engineer jobs in California are:
What cities in California are hiring for Junior Rtl Design Engineer jobs? Cities in California with the most Junior Rtl Design Engineer job openings:
Junior Rtl Design Engineer jobs near you
RTL Design Engineer

RTL Design Engineer

Advanced Micro Devices, Inc

San Jose, CA • On-site

$145.60K/yr

Full-time

Posted 9 hours ago

Advanced Micro Devices rating

7.8

Company rating: 7.8 out of 10

Based on 6 frontline employees who took The Breakroom Quiz

53rd of 137 rated electronics manufacturers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
Join AMD's Silicon Design team to design and develop cutting-edge IPs for next-generation embedded products. As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture specification through production silicon, working on complex IP design.
THE PERSON:
The ideal candidate is a seasoned ASIC/SOC designer with proven expertise across the entire chip development lifecycle-from RTL design through silicon bring-up. You excel in Verilog RTL coding, timing closure, and physical design awareness. With multiple production tape-outs under your belt, you bring deep technical expertise, strong ownership, and the ability to mentor junior engineers while driving projects to successful completion.
KEY RESPONSIBILITIES:
  • RTL Design & Microarchitecture: Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements.
  • Full ASIC Development Lifecycle: Drive design from concept through production silicon across all phases: specification, RTL coding, lint/CDC checks, synthesis, timing analysis, verification, physical design integration, and post-silicon validation.
  • Timing Closure & Optimization: Develop and maintain timing constraints (SDC), perform static timing analysis (STA) using industry-standard tools (PrimeTime/Tempus), resolve timing violations, and collaborate with physical design to achieve timing closure.
  • Design Quality & Verification: Partner with verification teams to ensure comprehensive functional coverage; implement design-for-test (DFT) and design-for-debug (DFD) features; participate in RTL quality reviews and signoff.
  • Automation & Productivity: Develop Python/Perl/Tcl scripts to automate repetitive tasks, improve design quality checks, and enhance team efficiency throughout the design flow.
  • Cross-Functional Collaboration: Engage with architecture, verification, physical design, CAD, and post-silicon teams to resolve complex technical challenges and deliver high-quality silicon on schedule.

REQUIRED QUALIFICATIONS:
  • Proven track record with 2+ production ASIC tape-outs in senior design roles
  • Expert-level Verilog RTL coding skills with deep understanding of synthesizable RTL constructs and coding best practices
  • Hands-on experience with the complete ASIC design flow: RTL • Synthesis • STA • Physical Design • Tape-out
  • Experience writing and debugging SDC timing constraints, including multi-cycle paths, false paths, and clock domain crossing constraints
  • Experience integrating complex IP blocks into SOC designs
  • Knowledge of industry-standard on-chip interconnect protocols (AMBA AXI/AHB/APB)
  • Bachelor's or Master's degree in Electrical Engineering or Computer Engineering

PREFERRED QUALIFICATIONS:
  • Knowledge of Verilog RTL Design • System Verilog • Static Timing Analysis (STA)
  • Knowledge of ARM architecture and AMBA protocol specifications
  • Familiarity with PCIe or CXL transaction layer protocols
  • Experience with low-power design techniques (clock gating, power gating, voltage scaling)
  • Proficiency in scripting languages: Python, Perl, Tcl, or Shell scripting
  • Exposure to formal verification tools for equivalence checking and property verification
  • Familiarity with AI-assisted design tools and modern EDA technologies
  • Experience mentoring junior engineers and leading design teams
  • Strong technical writing skills for design specifications and documentation
  • Excellent communication and collaboration skills in cross-functional environments

ACADEMIC CREDENTIALS:
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION: San Jose, CA
#LI-DW1
#LI-HYBRID
This role is not eligible for visa sponsorship.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

Apply