RTL Engineer (Ethernet)
San Francisco, CA ยท On-site
Sivaltech is hiring an experienced RTL Design Engineer with strong Ethernet expertise for a high-performance Networking IC development role in San Jose, CA. Required Skills * Strong RTL Design ...
San Francisco, CA ยท On-site
Sivaltech is hiring an experienced RTL Design Engineer with strong Ethernet expertise for a high-performance Networking IC development role in San Jose, CA. Required Skills * Strong RTL Design ...
San Francisco, CA ยท On-site
Sivaltech is hiring an experienced RTL Design Engineer with strong Ethernet expertise for a high-performance Networking IC development role in San Jose, CA. Required Skills * Strong RTL Design ...
Burlingame, CA ยท On-site
ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of ...
Burlingame, CA ยท On-site
ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of ...
San Jose, CA ยท On-site
Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications ...
San Jose, CA ยท On-site
Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications ...
San Jose, CA ยท On-site
$145K/yr
... junior engineers while driving projects to successful completion. KEY RESPONSIBILITIES: * RTL ... Drive design from concept through production silicon across all phases: specification, RTL coding ...
San Jose, CA ยท On-site
$145K/yr
... junior engineers while driving projects to successful completion. KEY RESPONSIBILITIES: * RTL ... Drive design from concept through production silicon across all phases: specification, RTL coding ...
You excel in Verilog RTL coding, timing closure, and physical design awareness. With multiple ... Experience mentoring junior engineers and leading design teams * Strong technical writing skills ...
You excel in Verilog RTL coding, timing closure, and physical design awareness. With multiple ... Experience mentoring junior engineers and leading design teams * Strong technical writing skills ...
Title: ASIC RTL Design Engineer - Onsite Mandatory skills: SoC Architecture, ASIC design flow, RTL coding, debugging, verification, supporting synthesis, timing closure, ARM cores, I/O standard ...
Title: ASIC RTL Design Engineer - Onsite Mandatory skills: SoC Architecture, ASIC design flow, RTL coding, debugging, verification, supporting synthesis, timing closure, ARM cores, I/O standard ...
... RTL design and test planning - Timing closure experience including timing constraints and PTSI. - Prior experience in digital and mixed signal circuit design for high speed PHYs - Hands-on experience ...
... RTL design and test planning - Timing closure experience including timing constraints and PTSI. - Prior experience in digital and mixed signal circuit design for high speed PHYs - Hands-on experience ...
Santa Clara, CA ยท On-site
The RTL Engineer performs detailed block design from system requirements and evolving specifications. Perform RTL coding, Lint checks, CDC tests, creating timing constraint file. Working closely with ...
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Santa Clara, CA ยท On-site
The RTL Engineer performs detailed block design from system requirements and evolving specifications. Perform RTL coding, Lint checks, CDC tests, creating timing constraint file. Working closely with ...
Sunnyvale, CA ยท On-site
Power Engineer (RTL Design) Location:Sunnyvale CA or Austin TX Duration: Long term Experience:8-15 Years DESCRIPTION: Please look for design engineers with power analysis experience Verification ...
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Sunnyvale, CA ยท On-site
Power Engineer (RTL Design) Location:Sunnyvale CA or Austin TX Duration: Long term Experience:8-15 Years DESCRIPTION: Please look for design engineers with power analysis experience Verification ...
San Jose, CA ยท On-site
Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications ...
San Jose, CA ยท On-site
Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications ...
Role and Responsibilities As an Engineer or Senior or Staff GPU RTL Design Engineer, you will contribute to the design and development of complex RTL blocks and subsystems for Samsung's next ...
Role and Responsibilities As an Engineer or Senior or Staff GPU RTL Design Engineer, you will contribute to the design and development of complex RTL blocks and subsystems for Samsung's next ...
San Jose, CA ยท On-site
$60 - $62.50/hr
SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role: Lead advanced CMOS SoC design using ARM, PCIe, DDR, and Ethernet. Responsibilities: Architecture definition and micro ...
San Jose, CA ยท On-site
$60 - $62.50/hr
SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role: Lead advanced CMOS SoC design using ARM, PCIe, DDR, and Ethernet. Responsibilities: Architecture definition and micro ...
Sunnyvale, CA ยท On-site
You will design RTL Intellectual Property (IP) with the focus on management and control subsystem ... that enable developers to build the future. From software to hardware our teams are shaping the ...
Sunnyvale, CA ยท On-site
You will design RTL Intellectual Property (IP) with the focus on management and control subsystem ... that enable developers to build the future. From software to hardware our teams are shaping the ...
San Jose, CA ยท On-site
Role and Responsibilities As an Engineer or Senior or Staff GPU RTL Design Engineer, you will contribute to the design and development of complex RTL blocks and subsystems for Samsung's next ...
San Jose, CA ยท On-site
Role and Responsibilities As an Engineer or Senior or Staff GPU RTL Design Engineer, you will contribute to the design and development of complex RTL blocks and subsystems for Samsung's next ...
San Jose, CA ยท On-site
$145K/yr
AMD SerDes Technology team is searching for a passionate and innovative RTL design engineer to develop high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS processes. THE ...
San Jose, CA ยท On-site
$145K/yr
AMD SerDes Technology team is searching for a passionate and innovative RTL design engineer to develop high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS processes. THE ...
San Francisco, CA ยท Remote
$100 - $175/hr
RTL Design Engineers Type: Contract Compensation: $100-$175/hour Location: Remote Duration: 3+ months Commitment: 40 hours/week Role Responsibilities * Evaluate digital chip design workflows to ...
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San Francisco, CA ยท Remote
$100 - $175/hr
RTL Design Engineers Type: Contract Compensation: $100-$175/hour Location: Remote Duration: 3+ months Commitment: 40 hours/week Role Responsibilities * Evaluate digital chip design workflows to ...
Experience optimizing RTL solutions, RTL design methodologies and automate front-end engineering flows. About the job In this role, you'll work to shape the future of AI/ML hardware acceleration. You ...
Experience optimizing RTL solutions, RTL design methodologies and automate front-end engineering flows. About the job In this role, you'll work to shape the future of AI/ML hardware acceleration. You ...
Campbell, CA ยท On-site
$60 - $62.50/hr
SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role: Lead advanced CMOS SoC design using ARM, PCIe, DDR, and Ethernet. Responsibilities: Architecture definition and micro ...
Campbell, CA ยท On-site
$60 - $62.50/hr
SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role: Lead advanced CMOS SoC design using ARM, PCIe, DDR, and Ethernet. Responsibilities: Architecture definition and micro ...
Sunnyvale, CA ยท On-site
$159K/yr
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 2 years of experience in ASIC RTL design, with a focus on ...
Sunnyvale, CA ยท On-site
$159K/yr
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 2 years of experience in ASIC RTL design, with a focus on ...
Irvine, CA ยท On-site
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
Irvine, CA ยท On-site
... RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description Develop signal processing intensive design for wireless communication SoCs ...
$33.1K - $39.9K
3% of jobs
$39.9K - $46.7K
20% of jobs
$48.2K is the 25th percentile. Wages below this are outliers.
$46.7K - $53.5K
7% of jobs
$53.5K - $60.3K
6% of jobs
$60.3K - $67.2K
12% of jobs
The median wage is $67.6K / yr.
$67.2K - $74K
17% of jobs
$77.6K is the 75th percentile. Wages above this are outliers.
$74K - $80.8K
17% of jobs
$80.8K - $87.6K
7% of jobs
$87.6K - $94.4K
4% of jobs
$94.4K - $101.2K
3% of jobs
$101.2K - $108.1K
2% of jobs
$33.1K
$70.9K
$108.1K
| Aspect | Junior Rtl Design Engineer | Digital Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's in Electrical Engineering or related field; some certifications | Bachelor's or higher in Electrical/Electronic Engineering; certifications vary |
| Work Environment | Design teams in semiconductor or electronics companies | Design and development teams in similar industries |
| Employer & Industry Usage | Commonly employed in chip design, FPGA, ASIC development | Used in digital circuit and system design across industries |
Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.
Perform RTL design and microarchitecture development.
Integrate Ethernet subsystems including MAC, PCS, and SerDes.
Debug and validate designs.
Sivaltech is hiring an experienced RTL Design Engineer with strong Ethernet expertise for a high-performance Networking IC development role in San Jose, CA.
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Semiconductor and electronic component manufacturing
51 - 200 Employees
San Diego, CA, US
2016