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Asic Design Verification Jobs (NOW HIRING)

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$152K - $219K/yr

What You'll Do As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center solutions. You'll architect and develop DV infrastructure, create ...

Cisco

ASIC Design Verification Engineer

San Jose, CA · On-site

$152K - $219K/yr

What You'll Do As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center solutions. You'll architect and develop DV infrastructure, create ...

K2 Space

OR · On-site

$130K - $200K/yr

The Role We are seeking an ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...

Positron AI

ASIC Design Verification Engineer

$200K - $350K/yr

Role Overview As an ASIC Design Verification Engineer, you will play a critical role in ensuring the functional correctness and performance of our AI inference ASICs. You will be responsible for ...

AvicenaTech

ASIC Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Avicena is seeking a talented and detail-oriented ASIC Design Verification (DV) Engineer to join our chip design team. You'll play a crucial role in ensuring the functional correctness, performance ...

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Asic Design Verification information

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How much do asic design verification jobs pay per year?

As of Jun 20, 2026, the average yearly pay for asic design verification in the United States is $156,077.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $175,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an ASIC Design Verification Engineer, and why are they important?

To thrive as an ASIC Design Verification Engineer, you need a solid background in digital design concepts, verification methodologies, and a degree in electrical or computer engineering. Proficiency with hardware description languages like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, attention to detail, and effective communication skills help you identify design flaws and collaborate with cross-functional teams. These skills are critical to ensuring the reliability, efficiency, and functionality of complex integrated circuits before production.

What are some common challenges faced in ASIC Design Verification, and how can they be addressed?

One of the main challenges in ASIC Design Verification is dealing with increasing design complexity and ensuring that all functional requirements are thoroughly tested within tight project timelines. To address this, verification engineers often use advanced methodologies such as UVM (Universal Verification Methodology) and leverage automation tools for testbench creation and regression testing. Effective collaboration with design engineers is also essential to quickly resolve issues and ensure alignment between the design and verification teams. Maintaining good documentation and regularly updating test plans helps keep the verification process organized and efficient.

What is ASIC Design Verification?

ASIC Design Verification is the process of ensuring that an Application-Specific Integrated Circuit (ASIC) design functions as intended before it is manufactured. This involves creating and running tests, simulations, and checks to detect and correct errors in the design. Verification engineers use specialized tools and methodologies such as simulation, formal verification, and emulation to verify the logic and performance of the ASIC. Thorough verification helps prevent costly mistakes and ensures the final chip meets all specifications.
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Asic Design Verification jobs near you
Infographic showing various Asic Design Verification job openings in the United States as of June 2026, with employment types broken down into 84% Full Time, 12% Part Time, and 4% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $156,077 per year, or $75 per hour.
ASIC Design Verification Lead

ASIC Design Verification Lead

Cornelis Networks

Austin, TX • On-site, Remote

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 2 days ago

Job description

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.


Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world's most demanding computational challenges with our next-generation networking solutions.


We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.


Cornelis Networks is hiring a talented ASIC Design Verification Leadto help drive innovation and contribute to the development of cutting-edge technologies in the semiconductor industry. In this role, you will be responsiblefor leading an ASIC Design Verification Team and deliver block level and full chip verification and emulation activities with high quality. You will oversee verification test planning, execution, and the development of innovative verification methodologies while driving functional and code coverage closure.


Key Responsibilities:This role requires close collaboration with RTL, architecture, software/firmware, emulation, and post-silicon validation teams. You will work across cross-functional teams, engaging and driving. Additionally, you will contribute to the development and execution of a DV strategy that aligns with the company's objectives for first pass silicon success. You will also be responsible for hiring, training, and supporting a team of ASIC engineers to ensure timely and cost-effective product development. You will also be responsible for the people management aspects to support the organizational goals.


Minimum Qualifications:

  • 15 + years' experiencein ASIC/SoC design verification.
  • 5 + years' experience being a technical lead
  • Expertise in design verification tools such as Synopsys VCS and Verdi.
  • Proven success in first-pass ASIC development.
  • Experience managing multiple projects and adjusting priorities with stakeholders.
  • Proficiency in developing UVM constrained random test benches.
  • Strong understanding of interpreting functional specifications and creating comprehensive test plans.
  • B.S. or M.S. in Computer Engineering, Electrical Engineering, or related technical field, or equivalent practical experience.


Preferred Qualifications:

  • Experience in building UVM environments from scratch.
  • Previous experience in a startup environment, demonstrating adaptability and a hands-on approach.
  • Expertise in working with networking System on Chips (SOCs).
  • Strong leadership in a dynamic, fast-paced development environment.


Location:This is a remote position for employees residing within the United States.


We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.
At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.


In addition to your base pay, you'll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.


Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

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