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Part Time Asic Verification Manager Jobs (NOW HIRING)

Weekday AI

ASIC/SoC Design & Verification Engineer

$70 - $100/hr

We are seeking experienced ASIC and SoC Design & Verification Engineers to contribute their ... This is a fully remote, part-time engagement requiring approximately 20-40 hours per week ...

Tire Rack

Operator I PT-12:30p-5p

South Bend, IN · On-site

Verification Employment Type: Part-Time, Non-Exempt Schedule: Monday- Friday, 12:30 p.m. - 5:00 p.m. (up to 20 hours per week) Reports To: Payment and Verification Manager Join the Tire Rack Team ...

Tire Rack

Operator I PT-8a-12:30p

South Bend, IN · On-site

Verification Employment Type: Part-Time, Non-Exempt Schedule: Monday- Friday, 8:00 a.m. - 12:30 p.m . (up to 20 hours per week) Reports To: Payment and Verification Manager Join the Tire Rack Team ...

Blockchain Power Corp

Technician

Bruceton Mills, WV · On-site

$21/hr

Manage inventory of ASIC miners * Daily and weekly reports on performances of the miners fleet ... Part time 12.5 hour weekend night shift positions with ability to pick up additional hours

Blockchain Power Corp

Technician

Bruceton Mills, WV · On-site

$21/hr

Manage inventory of ASIC miners * Daily and weekly reports on performances of the miners fleet ... Part time 12.5 hour weekend night shift positions with ability to pick up additional hours

Gadjab

Insurance Verification Specialist

Lehi, UT · Hybrid

$22/hr

We are seeking a part time Insurance Verification Specialist with strong customer service and ... This position will report to the Director of Revenue Cycle Management and collaborate with ...

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Part Time Asic Verification Manager information

What is the difference between Part Time Asic Verification Manager vs Part Time Digital Design Engineer?

AspectPart Time Asic Verification ManagerPart Time Digital Design Engineer
Primary FocusOverseeing ASIC verification processes and managing verification teamsDesigning digital circuits and implementing hardware logic
Required SkillsVerification methodologies, team management, hardware description languagesDigital design, HDL coding, circuit simulation
Work EnvironmentCollaborative teams in semiconductor or tech companiesDesign labs, R&D departments in tech firms
Common UsageUsed in verification phases of ASIC developmentUsed in hardware design and development

The Part Time Asic Verification Manager primarily oversees verification activities and manages verification teams, focusing on ensuring ASIC functionality. In contrast, the Part Time Digital Design Engineer concentrates on creating and implementing digital hardware designs. While both roles require knowledge of hardware description languages, the verification manager emphasizes management and verification processes, whereas the digital design engineer focuses on circuit design and implementation.

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Part Time Asic Verification Manager jobs near you
Infographic showing various Part Time Asic Verification Manager job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 86% Full Time, 12% Part Time, and 1% Contract. Highlights an 94% Physical, 2% Hybrid, and 4% Remote job distribution.

ASIC/SoC Design & Verification Engineer

Weekday AI

Remote

$70 - $100/hr

Part-time

Posted 18 days ago

Job description

This role is for one of our clients
Compensation: $70-$100 per hour
Join a cutting-edge AI initiative focused on advancing how next-generation AI systems understand real-world hardware engineering. We are seeking experienced ASIC and SoC Design & Verification Engineers to contribute their expertise in digital design, RTL development, functional verification, and silicon implementation to improve AI model capabilities.
Whether you're an early-career engineer, a PhD researcher, or a seasoned professional who has successfully taken chips through tapeout, this opportunity allows you to apply your practical engineering knowledge to help train and evaluate frontier AI systems.
This is a fully remote, part-time engagement requiring approximately 20-40 hours per week, depending on your availability.
Requirements
Key Responsibilities
  • Design realistic chip architecture, RTL, debugging, and verification challenges based on real engineering experience.
  • Develop complete reference solutions, including RTL implementations, verification environments, testbenches, and supporting documentation using Verilog/SystemVerilog.
  • Evaluate AI-generated hardware solutions, identify strengths and weaknesses, and provide detailed technical feedback.
  • Analyze where AI models struggle with hardware engineering concepts, debugging, verification strategies, and design trade-offs.
  • Collaborate with fellow hardware engineers to maintain consistency, technical accuracy, and high-quality engineering standards across all evaluation tasks.
  • Help improve AI understanding of modern digital design methodologies, verification practices, and semiconductor development workflows.
Required Qualifications
  • Hands-on experience in ASIC and/or SoC design, functional verification, or digital hardware development, preferably involving production silicon or tapeout projects.
  • Strong proficiency in SystemVerilog and Verilog.
  • Experience working with industry-standard EDA tools such as Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, Verdi, or equivalent open-source tools including Icarus Verilog, Verilator, Cocotb, Yosys, and OpenROAD.
  • Strong understanding of system-level hardware concepts including interface protocols, clock-domain crossing (CDC), handshaking, backpressure, and multi-module data flow.
  • Deep expertise in one or more of the following areas:
    • RTL Design and Microarchitecture
    • Functional Verification (UVM, SVA, Cocotb, testbench development)
    • IP Integration and SoC Bring-up (AXI, PCIe, DDR, NoC, ARM-based systems)
    • Formal Verification and Coverage Closure
    • Timing Closure, Synthesis, Power, Performance, and Area (PPA) Optimization
    • Analog/Mixed-Signal Design Verification
    • Hardware Specification Development and Technical Documentation
  • Ability to commit 20-40 hours per week with reliable weekday availability.
  • Strong written communication skills and the ability to work independently in a remote environment.
Preferred Qualifications
  • Experience participating in AI model training, evaluation, data annotation, or technical benchmarking projects.
  • Graduate research or industry experience in semiconductor design, verification, or computer architecture.
  • Familiarity with modern AI-assisted engineering tools and automated hardware design workflows.
  • Experience mentoring engineers or reviewing complex technical designs.
Why Join
  • Help shape how advanced AI systems understand and solve real-world semiconductor engineering challenges.
  • Apply your practical chip design and verification expertise to improve the next generation of AI models.
  • Work alongside experienced hardware engineers, researchers, and AI specialists on high-impact projects.
  • Enjoy the flexibility of a fully remote engagement with opportunities for continued collaboration based on performance.
Equal Opportunity
We are committed to creating an inclusive environment and welcome applications from qualified professionals of all backgrounds. Reasonable accommodations are available throughout the application and engagement process.
Contract & Engagement Details
  • Independent contractor engagement.
  • Fully remote with flexible working hours.
  • Expected commitment of approximately 20-40 hours per week.
  • Project duration may be extended, shortened, or concluded based on project requirements and individual performance.
  • Work does not require access to confidential or proprietary information from any current or former employer.
  • Payments are issued weekly based on approved work completed.
  • At this time, we are unable to support H1-B or STEM OPT candidates.

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