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Asic Design Verification Jobs (NOW HIRING)

Influence ASIC architecture and design to enable robust verification and high-quality silicon. * Serve as subject matter expert and advisor on industry trends, best practices, and new technologies.

Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to-end verification of design blocks and top-level * Develop simulation models, test plans, direct and ...

Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center solutions. You'll architect and develop DV infrastructure, create ...

Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center solutions. You'll architect and develop DV infrastructure, create ...

Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to-end verification of design blocks and top-level * Develop simulation models, test plans, direct and ...

Influence ASIC architecture and design to enable robust verification and high-quality silicon. * Serve as subject matter expert and advisor on industry trends, best practices, and new technologies.

OR

$170K - $250K/yr

The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...

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Asic Design Verification information

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$88K

$156.1K

$207K

How much do asic design verification jobs pay per year?

As of Jun 20, 2026, the average yearly pay for asic design verification in the United States is $156,077.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $175,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an ASIC Design Verification Engineer, and why are they important?

To thrive as an ASIC Design Verification Engineer, you need a solid background in digital design concepts, verification methodologies, and a degree in electrical or computer engineering. Proficiency with hardware description languages like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, attention to detail, and effective communication skills help you identify design flaws and collaborate with cross-functional teams. These skills are critical to ensuring the reliability, efficiency, and functionality of complex integrated circuits before production.

What are some common challenges faced in ASIC Design Verification, and how can they be addressed?

One of the main challenges in ASIC Design Verification is dealing with increasing design complexity and ensuring that all functional requirements are thoroughly tested within tight project timelines. To address this, verification engineers often use advanced methodologies such as UVM (Universal Verification Methodology) and leverage automation tools for testbench creation and regression testing. Effective collaboration with design engineers is also essential to quickly resolve issues and ensure alignment between the design and verification teams. Maintaining good documentation and regularly updating test plans helps keep the verification process organized and efficient.

What is ASIC Design Verification?

ASIC Design Verification is the process of ensuring that an Application-Specific Integrated Circuit (ASIC) design functions as intended before it is manufactured. This involves creating and running tests, simulations, and checks to detect and correct errors in the design. Verification engineers use specialized tools and methodologies such as simulation, formal verification, and emulation to verify the logic and performance of the ASIC. Thorough verification helps prevent costly mistakes and ensures the final chip meets all specifications.
More about Asic Design Verification jobs
What cities are hiring for Asic Design Verification jobs? Cities with the most Asic Design Verification job openings:
What are the most commonly searched types of Asic Design Verification jobs? The most popular types of Asic Design Verification jobs are:
What states have the most Asic Design Verification jobs? States with the most job openings for Asic Design Verification jobs include:
Infographic showing various Asic Design Verification job openings in the United States as of June 2026, with employment types broken down into 84% Full Time, 12% Part Time, and 4% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $156,077 per year, or $75 per hour.
Principal ASIC Design Verification Engineer (Starshield)

Principal ASIC Design Verification Engineer (Starshield)

SpaceX

Hawthorne, CA • On-site

$200K - $285K/yr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Posted 17 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 144 frontline employees who took The Breakroom Quiz

13th of 60 rated aerospace companies


Job description

PRINCIPAL ASIC DESIGN VERIFICATION ENGINEER (STARSHIELD)

Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and commercial use, Starshield is designed for government use, with an initial focus on earth observation, communications, and hosted payloads. As an ASIC Design Verification Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security. In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe. You will work in a highly collaborative and fast-paced environment, where we are exploring unsolved problems and applying the SpaceX mindset of iterating rapidly to go from design and demo to operational capability at lightning pace.

RESPONSIBILITIES:

  • Responsible for digital ASIC verification at block and system level
  • Lead and execute verification test plan, development, and milestones from beginning to end, develop test harnesses and test sequences
  • Develop SystemVerilog testbench infrastructure (both UVM and non-UVM) for testing designs, including DSP blocks
  • Responsible for test plan execution, running regressions, code and functional coverage closure
  • Automate test case generation by using Python and MATLAB programs
  • Contribute to pre-silicon verification, chip bring-up and post-silicon validation
  • Be a hands-on self-starter who can execute the steps required to fully verify complex digital designs

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering, computer engineering, or computer science
  • 8+ years of experience with design verification and test bench development

PREFERRED SKILLS AND EXPERIENCE:

  • Advanced degree in electrical engineering or computer engineering
  • Experience with verification methodologies such as UVM/OVM/VMM
  • Strong object-oriented programming knowledge
  • Strong problem-solving and coding skills
  • Experience in constrained random verification
  • Expertise in developing test plans, implementing coverage models, and analyzing results
  • Experience with scripting languages, e.g. Python for automation
  • RTL design, chip bring-up, and post-silicon validation experience
  • Ability to work in a dynamic environment with changing needs and requirements
  • Ability to work in a dynamic environment with changing needs and requirements
  • Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
  • Enjoy being challenged and learning new skills

ADDITIONAL REQUIREMENTS:

  • Ability to work long hours and weekends as necessary to support critical milestones
  • Willingness to travel for off-site testing
  • An active clearance may provide the opportunity for you to work on sensitive SpaceX missions; if so, you will be subject to pre-employment drug and random drug and alcohol testing

COMPENSATION AND BENEFITS:    
Pay range:    
Principal ASIC Design Verification Engineer: $200,000.00 - $285,000.00/per year    
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience. Those with an active clearance will receive a 10% differential, up to an additional $20,000 annually, once officially briefed into a classified program.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees accrue paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law.


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